[U-Boot] [PATCH 3/5] powerpc/hydra: Add ethernet support on P5020/P3041 DS boards

[Kumar Gala]

On Aug 1, 2011, at 1:23 AM, Kumar Gala wrote:

> From: Timur Tabi <timur at freescale.com>
> 
> Add support for RGMII, SGMII, and XAUI (10Gb) Ethernet on P3041DS &
> P5020DS ("Hydra").
> 
> The lane_to_slot[] array is initialized dynamically, since board switches
> can be used to control the muxing of SERDES lanes to slots.
> 
> The BRDCFG1 PIXIS register is used to route the MII bus to the appropriate
> slot.  The SERDES configuration is queried to help determine the routing
> between MACs and slot/phy combination.
> 
> If a XAUI card is inserted, muxing for that card is enabled and never
> turned off.  The PHY address for the 10G XAUI card depends on the slot in
> which it's inserted.  If it's in slot 1, the address is 4.  If it's in
> slot 2, the address is 0.
> 
> Update the MDIO routing in the P3041DS and P5020DS device trees based on
> the board-level muxing.  The SERDES configuration determines which
> SGMII/XGMII boards are located in which slots, and so the MDIO bus needs
> to be muxed correctly whenever talking to a PHY connected to any Fman MAC.
> The Fman Ethernet nodes in the device tree also need to be routed to the
> correct PHYs.
> 
> Removed CONFIG_SYS_FMAN_FW as its not used anywhere.
> 
> Signed-off-by: Ioana Radulescu <ruxandra.radulescu at freescale.com>
> Signed-off-by: Timur Tabi <timur at freescale.com>
> Signed-off-by: Andy Fleming <afleming at freescale.com>
> Signed-off-by: Kumar Gala <galak at kernel.crashing.org>
> ---
> board/freescale/corenet_ds/Makefile    |    2 +
> board/freescale/corenet_ds/eth_hydra.c |  553 ++++++++++++++++++++++++++++++++
> 2 files changed, 555 insertions(+), 0 deletions(-)
> create mode 100644 board/freescale/corenet_ds/eth_hydra.c

applied to 85xx next

- k