[U-Boot] [PATCH 2/2] Exynos: Fix ARM Clock frequency calculation
Chander Kashyap
chander.kashyap at linaro.org
Mon Dec 19 09:20:27 CET 2011
Dear Wolfgang Denk,
On 19 December 2011 13:27, Wolfgang Denk <wd at denx.de> wrote:
> Dear Chander Kashyap,
>
> In message <1324275424-29468-3-git-send-email-chander.kashyap at linaro.org>
> you wrote:
> > Earliar ARM clock frequency was calculated by:
> > MOUTAPLL/(DIVAPLL + 1) which is actually returning SCLKAPLL.
> > It is fixed by calcuating it as follows:
>
> Um.... Comment and code disagree:
>
> > ARMCLK=MOUTCORE/(DIVCORE + 1)/DIVCORE2 + 1)
>
> ...or is this just missing a paren?
>
> > + dout_apll = get_pll_clk(APLL) / (core_ratio + 1);
> > + dout_apll /= (core2_ratio + 1);
>
> This gives
>
> ARMCLK=MOUTCORE/(DIVCORE + 1)/ (DIVCORE2 + 1)
>
> Please check if this is correct.
>
Below is the scenario of selection.
____________
MOUTAPLL --------------->| MUX_CORE |------------>MOUTCORE
MOUTMPLL --------------->|____________|
Here MOUTAPLL is selected as input. So Parent is correct.
Best regards,
>
> Wolfgang Denk
>
> --
> DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
> Bus error -- driver executed.
>
--
with warm regards,
Chander Kashyap
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