[U-Boot] [PATCH v6 4/4] mx28evk: Add initial support for MX28EVK board
Marek Vasut
marek.vasut at gmail.com
Tue Dec 20 14:58:15 CET 2011
> Add initial support for Freescale MX28EVK board.
>
> Tested boot via SD card and by loading a kernel via TFTP through
> the FEC interface.
>
> Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>
> ---
> - For correct operation of saving environment variables into the SD card,
> the following patch is needed:
> http://lists.denx.de/pipermail/u-boot/2011-November/111448.html
> Changes since v5:
> - Fix tab vs spaces on mx28evk.h
> - Change return value on dram_init()
> Changes since v4:
> - No changes
> Changes since v3:
> - Fix Copyright in mx28evk.h
> - Call mx28_dram_init from dram_init
> Changes since v2:
> - Generate the patch again due to error in applying unrelated changes
> Changes since v1:
> - Read the MAC from fuses
> - Use tabs instead of space in u-boot.bd
> - Use puts instead of print
> - Factor out mac reading function
> - Factor out ddr size calculation function
> - Use GENERATED_GBL_DATA_SIZE
> - Protect CONFIG_ENV_IS_IN_MMC
> MAINTAINERS | 1 +
> board/freescale/mx28evk/Makefile | 49 ++++++++++
> board/freescale/mx28evk/iomux.c | 138 +++++++++++++++++++++++++++++
> board/freescale/mx28evk/mx28evk.c | 169
> +++++++++++++++++++++++++++++++++++ board/freescale/mx28evk/u-boot.bd |
> 14 +++
> boards.cfg | 1 +
> include/configs/mx28evk.h | 176
> +++++++++++++++++++++++++++++++++++++ 7 files changed, 548 insertions(+),
> 0 deletions(-)
> create mode 100644 board/freescale/mx28evk/Makefile
> create mode 100644 board/freescale/mx28evk/iomux.c
> create mode 100644 board/freescale/mx28evk/mx28evk.c
> create mode 100644 board/freescale/mx28evk/u-boot.bd
> create mode 100644 include/configs/mx28evk.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index a56ca10..72e1089 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -639,6 +639,7 @@ Kristoffer Ericson <kristoffer.ericson at gmail.com>
> Fabio Estevam <fabio.estevam at freescale.com>
>
> mx25pdk i.MX25
> + mx28evk i.MX28
> mx31pdk i.MX31
> mx53ard i.MX53
> mx53smd i.MX53
> diff --git a/board/freescale/mx28evk/Makefile
> b/board/freescale/mx28evk/Makefile new file mode 100644
> index 0000000..7459107
> --- /dev/null
> +++ b/board/freescale/mx28evk/Makefile
> @@ -0,0 +1,49 @@
> +#
> +# (C) Copyright 2000-2006
> +# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB = $(obj)lib$(BOARD).o
> +
> +ifndef CONFIG_SPL_BUILD
> +COBJS := mx28evk.o
> +else
> +COBJS := iomux.o
> +endif
> +
> +SRCS := $(COBJS:.o=.c)
> +OBJS := $(addprefix $(obj),$(COBJS))
> +
> +$(LIB): $(obj).depend $(OBJS)
> + $(call cmd_link_o_target, $(OBJS))
> +
> +all: $(ALL)
> +
> +#########################################################################
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> diff --git a/board/freescale/mx28evk/iomux.c
> b/board/freescale/mx28evk/iomux.c new file mode 100644
> index 0000000..904e3f3
> --- /dev/null
> +++ b/board/freescale/mx28evk/iomux.c
> @@ -0,0 +1,138 @@
> +/*
> + * Freescale MX28EVK IOMUX setup
> + *
> + * Copyright (C) 2011 Marek Vasut <marek.vasut at gmail.com>
> + * on behalf of DENX Software Engineering GmbH
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <common.h>
> +#include <config.h>
> +#include <asm/io.h>
> +#include <asm/arch/iomux-mx28.h>
> +#include <asm/arch/imx-regs.h>
> +#include <asm/arch/sys_proto.h>
> +
> +#define MUX_CONFIG_SSP0 (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
> +#define MUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
> +#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
> +
> +const iomux_cfg_t iomux_setup[] = {
> + /* DUART */
> + MX28_PAD_PWM0__DUART_RX,
> + MX28_PAD_PWM1__DUART_TX,
> +
> + /* MMC0 */
> + MX28_PAD_SSP0_DATA0__SSP0_D0 | MUX_CONFIG_SSP0,
> + MX28_PAD_SSP0_DATA1__SSP0_D1 | MUX_CONFIG_SSP0,
> + MX28_PAD_SSP0_DATA2__SSP0_D2 | MUX_CONFIG_SSP0,
> + MX28_PAD_SSP0_DATA3__SSP0_D3 | MUX_CONFIG_SSP0,
> + MX28_PAD_SSP0_DATA4__SSP0_D4 | MUX_CONFIG_SSP0,
> + MX28_PAD_SSP0_DATA5__SSP0_D5 | MUX_CONFIG_SSP0,
> + MX28_PAD_SSP0_DATA6__SSP0_D6 | MUX_CONFIG_SSP0,
> + MX28_PAD_SSP0_DATA7__SSP0_D7 | MUX_CONFIG_SSP0,
> + MX28_PAD_SSP0_CMD__SSP0_CMD | MUX_CONFIG_SSP0,
> + MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
> + (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
> + MX28_PAD_SSP0_SCK__SSP0_SCK |
> + (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
> + /* write protect */
> + MX28_PAD_SSP1_SCK__GPIO_2_12,
> + /* MMC0 slot power enable */
> + MX28_PAD_PWM3__GPIO_3_28 |
> + (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
> +
> + /* FEC0 */
> + MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET,
> + MX28_PAD_ENET0_MDIO__ENET0_MDIO | MUX_CONFIG_ENET,
> + MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MUX_CONFIG_ENET,
> + MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MUX_CONFIG_ENET,
> + MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MUX_CONFIG_ENET,
> + MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MUX_CONFIG_ENET,
> + MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MUX_CONFIG_ENET,
> + MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MUX_CONFIG_ENET,
> + MX28_PAD_ENET_CLK__CLKCTRL_ENET | MUX_CONFIG_ENET,
> + /* FEC0 Enable */
> + MX28_PAD_SSP1_DATA3__GPIO_2_15 |
> + (MXS_PAD_12MA | MXS_PAD_3V3),
> + /* FEC0 Reset */
> + MX28_PAD_ENET0_RX_CLK__GPIO_4_13 |
> + (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
> +
> + /* FEC1 */
> + MX28_PAD_ENET0_COL__ENET1_TX_EN | MUX_CONFIG_ENET,
> + MX28_PAD_ENET0_CRS__ENET1_RX_EN | MUX_CONFIG_ENET,
> + MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MUX_CONFIG_ENET,
> + MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MUX_CONFIG_ENET,
> + MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MUX_CONFIG_ENET,
> + MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MUX_CONFIG_ENET,
> +
> + /* EMI */
> + MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_D02__EMI_DATA2 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_D03__EMI_DATA3 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_D04__EMI_DATA4 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_D05__EMI_DATA5 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_D06__EMI_DATA6 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_D07__EMI_DATA7 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_D08__EMI_DATA8 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_D09__EMI_DATA9 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_D10__EMI_DATA10 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_D11__EMI_DATA11 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_D12__EMI_DATA12 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_D13__EMI_DATA13 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_D14__EMI_DATA14 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_ODT1__EMI_ODT1 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN | MUX_CONFIG_EMI,
> +
> + MX28_PAD_EMI_A00__EMI_ADDR0 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_A01__EMI_ADDR1 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_A02__EMI_ADDR2 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_A03__EMI_ADDR3 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_A04__EMI_ADDR4 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_A05__EMI_ADDR5 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_A06__EMI_ADDR6 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_A07__EMI_ADDR7 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_A08__EMI_ADDR8 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_A09__EMI_ADDR9 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_A10__EMI_ADDR10 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_A11__EMI_ADDR11 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_A12__EMI_ADDR12 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_A13__EMI_ADDR13 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_A14__EMI_ADDR14 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_BA2__EMI_BA2 | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
> + MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
> +};
> +
> +void board_init_ll(void)
> +{
> + mx28_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
> +}
> diff --git a/board/freescale/mx28evk/mx28evk.c
> b/board/freescale/mx28evk/mx28evk.c new file mode 100644
> index 0000000..0d04d44
> --- /dev/null
> +++ b/board/freescale/mx28evk/mx28evk.c
> @@ -0,0 +1,169 @@
> +/*
> + * Freescale MX28EVK board
> + *
> + * (C) Copyright 2011 Freescale Semiconductor, Inc.
> + *
> + * Author: Fabio Estevam <fabio.estevam at freescale.com>
> + *
> + * Based on m28evk.c:
> + * Copyright (C) 2011 Marek Vasut <marek.vasut at gmail.com>
> + * on behalf of DENX Software Engineering GmbH
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <common.h>
> +#include <asm/gpio.h>
> +#include <asm/io.h>
> +#include <asm/arch/imx-regs.h>
> +#include <asm/arch/iomux-mx28.h>
> +#include <asm/arch/clock.h>
> +#include <asm/arch/sys_proto.h>
> +#include <linux/mii.h>
> +#include <miiphy.h>
> +#include <netdev.h>
> +#include <errno.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +/*
> + * Functions
> + */
> +int board_early_init_f(void)
> +{
> + /* IO0 clock at 480MHz */
> + mx28_set_ioclk(MXC_IOCLK0, 480000);
> + /* IO1 clock at 480MHz */
> + mx28_set_ioclk(MXC_IOCLK1, 480000);
> +
> + /* SSP0 clock at 96MHz */
> + mx28_set_sspclk(MXC_SSPCLK0, 96000, 0);
> + /* SSP2 clock at 96MHz */
> + mx28_set_sspclk(MXC_SSPCLK2, 96000, 0);
> +
> + return 0;
> +}
> +
> +int dram_init(void)
> +{
> + return mx28_dram_init();
> +}
> +
> +int board_init(void)
> +{
> + /* Adress of boot parameters */
> + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_CMD_MMC
> +static int mx28evk_mmc_wp(int id)
> +{
> + if (id != 0) {
> + printf("MXS MMC: Invalid card selected (card id = %d)\n", id);
> + return 1;
> + }
> +
> + return gpio_get_value(MX28_PAD_SSP1_SCK__GPIO_2_12);
> +}
> +
> +int board_mmc_init(bd_t *bis)
> +{
> + /* Configure WP as input */
> + gpio_direction_input(MX28_PAD_SSP1_SCK__GPIO_2_12);
> +
> + /* Configure MMC0 Power Enable */
> + gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 0);
> +
> + return mxsmmc_initialize(bis, 0, mx28evk_mmc_wp);
> +}
> +#endif
> +
> +#ifdef CONFIG_CMD_NET
> +
> +#define MII_OPMODE_STRAP_OVERRIDE 0x16
> +#define MII_PHY_CTRL1 0x1e
> +#define MII_PHY_CTRL2 0x1f
> +
> +int fecmxc_mii_postcall(int phy)
> +{
> + miiphy_write("FEC1", phy, MII_BMCR, 0x9000);
> + miiphy_write("FEC1", phy, MII_OPMODE_STRAP_OVERRIDE, 0x0202);
> + if (phy == 3)
> + miiphy_write("FEC1", 3, MII_PHY_CTRL2, 0x8180);
> + return 0;
> +}
> +
> +int board_eth_init(bd_t *bis)
> +{
> + struct mx28_clkctrl_regs *clkctrl_regs =
> + (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
> + struct eth_device *dev;
> + int ret;
> +
> + ret = cpu_eth_init(bis);
> +
> + /* MX28EVK uses ENET_CLK PAD to drive FEC clock */
> + writel(CLKCTRL_ENET_TIME_SEL_RMII_CLK | CLKCTRL_ENET_CLK_OUT_EN,
> + &clkctrl_regs->hw_clkctrl_enet);
> +
> + /* Power-on FECs */
> + gpio_direction_output(MX28_PAD_SSP1_DATA3__GPIO_2_15, 0);
> +
> + /* Reset FEC PHYs */
> + gpio_direction_output(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 0);
> + udelay(200);
> + gpio_set_value(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 1);
> +
> + ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
> + if (ret) {
> + puts("FEC MXS: Unable to init FEC0\n");
> + return ret;
> + }
> +
> + ret = fecmxc_initialize_multi(bis, 1, 3, MXS_ENET1_BASE);
> + if (ret) {
> + puts("FEC MXS: Unable to init FEC1\n");
> + return ret;
> + }
> +
> + dev = eth_get_dev_by_name("FEC0");
> + if (!dev) {
> + puts("FEC MXS: Unable to get FEC0 device entry\n");
> + return -EINVAL;
> + }
> +
> + ret = fecmxc_register_mii_postcall(dev, fecmxc_mii_postcall);
> + if (ret) {
> + puts("FEC MXS: Unable to register FEC0 mii postcall\n");
> + return ret;
> + }
> +
> + dev = eth_get_dev_by_name("FEC1");
> + if (!dev) {
> + puts("FEC MXS: Unable to get FEC1 device entry\n");
> + return -EINVAL;
> + }
> +
> + ret = fecmxc_register_mii_postcall(dev, fecmxc_mii_postcall);
> + if (ret) {
> + puts("FEC MXS: Unable to register FEC1 mii postcall\n");
> + return ret;
> + }
> +
> + return ret;
> +}
> +
> +#endif
> diff --git a/board/freescale/mx28evk/u-boot.bd
> b/board/freescale/mx28evk/u-boot.bd new file mode 100644
> index 0000000..c60615a
> --- /dev/null
> +++ b/board/freescale/mx28evk/u-boot.bd
> @@ -0,0 +1,14 @@
> +sources {
> + u_boot_spl="spl/u-boot-spl.bin";
> + u_boot="u-boot.bin";
> +}
> +
> +section (0) {
> + load u_boot_spl > 0x0000;
> + load ivt (entry = 0x0014) > 0x8000;
> + hab call 0x8000;
> +
> + load u_boot > 0x40000100;
> + load ivt (entry = 0x40000100) > 0x8000;
> + hab call 0x8000;
> +}
> diff --git a/boards.cfg b/boards.cfg
> index 1e5b3e0..e859024 100644
> --- a/boards.cfg
> +++ b/boards.cfg
> @@ -160,6 +160,7 @@ zmx25 arm arm926ejs
> zmx25 syteco imx27lite arm
> arm926ejs imx27lite logicpd mx27 magnesium
> arm arm926ejs imx27lite logicpd mx27
> m28evk arm arm926ejs -
> denx mx28 +mx28evk arm arm926ejs
> - freescale mx28 nhk8815 arm
> arm926ejs nhk8815 st nomadik
> nhk8815_onenand arm arm926ejs nhk8815
> st nomadik nhk8815:BOOT_ONENAND omap1610h2 arm
> arm926ejs omap1610inn ti omap omap1610inn:CS3_BOOT
diff --git
> a/include/configs/mx28evk.h b/include/configs/mx28evk.h new file mode
> 100644
> index 0000000..5b8a1bf
> --- /dev/null
> +++ b/include/configs/mx28evk.h
> @@ -0,0 +1,176 @@
> +/*
> + * (C) Copyright 2011 Freescale Semiconductor, Inc.
> + * Author: Fabio Estevam <fabio.estevam at freescale.com>
> + *
> + * Based on m28evk.h:
> + * Copyright (C) 2011 Marek Vasut <marek.vasut at gmail.com>
> + * on behalf of DENX Software Engineering GmbH
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +#include <asm/arch/regs-base.h>
> +
> +/*
> + * SoC configurations
> + */
> +#define CONFIG_MX28 /* i.MX28 SoC */
> +#define CONFIG_MXS_GPIO /* GPIO control */
> +#define CONFIG_SYS_HZ 1000 /* Ticks per second */
> +
> +#define CONFIG_MACH_TYPE MACH_TYPE_MX28EVK
> +
> +#define CONFIG_SYS_NO_FLASH
> +#define CONFIG_SYS_ICACHE_OFF
> +#define CONFIG_SYS_DCACHE_OFF
> +#define CONFIG_BOARD_EARLY_INIT_F
> +#define CONFIG_ARCH_CPU_INIT
> +#define CONFIG_ARCH_MISC_INIT
> +
> +/*
> + * SPL
> + */
> +#define CONFIG_SPL
> +#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
> +#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mx28"
> +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds"
> +#define CONFIG_SPL_LIBCOMMON_SUPPORT
> +#define CONFIG_SPL_LIBGENERIC_SUPPORT
> +
> +/*
> + * U-Boot Commands
> + */
> +#include <config_cmd_default.h>
> +#define CONFIG_DISPLAY_CPUINFO
> +#define CONFIG_DOS_PARTITION
> +#define CONFIG_CMD_FAT
> +
> +#define CONFIG_CMD_CACHE
> +#define CONFIG_CMD_DHCP
> +#define CONFIG_CMD_GPIO
> +#define CONFIG_CMD_MII
> +#define CONFIG_CMD_MMC
> +#define CONFIG_CMD_NET
> +#define CONFIG_CMD_NFS
> +#define CONFIG_CMD_PING
> +
> +/*
> + * Memory configurations
> + */
> +#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
> +#define PHYS_SDRAM_1 0x40000000 /* Base address */
> +#define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */
> +#define CONFIG_STACKSIZE (128 * 1024) /* 128 KB stack */
> +#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for
malloc */
> +#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
> +#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test
*/
> +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
> +/* Point initial SP in SRAM so SPL can use it too. */
> +
> +#define CONFIG_SYS_INIT_RAM_ADDR 0x00002000
> +#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
> +
> +#define CONFIG_SYS_INIT_SP_OFFSET \
> + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
> +#define CONFIG_SYS_INIT_SP_ADDR \
> + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
> +
> +/*
> + * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
> + * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
> + * binary. In case there was more of this mess, 0x100 bytes are skipped.
> + */
> +#define CONFIG_SYS_TEXT_BASE 0x40000100
> +
> +#define CONFIG_ENV_OVERWRITE
> +/*
> + * U-Boot general configurations
> + */
> +#define CONFIG_SYS_LONGHELP
> +#define CONFIG_SYS_PROMPT "MX28EVK U-Boot > "
> +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
> +#define CONFIG_SYS_PBSIZE \
> + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
> + /* Print buffer size */
> +#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
> +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
> + /* Boot argument buffer size */
> +#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
> +#define CONFIG_AUTO_COMPLETE /* Command auto complete */
> +#define CONFIG_CMDLINE_EDITING /* Command history etc */
> +#define CONFIG_SYS_HUSH_PARSER
> +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
> +
> +/*
> + * Serial Driver
> + */
> +#define CONFIG_PL011_SERIAL
> +#define CONFIG_PL011_CLOCK 24000000
> +#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
> +#define CONFIG_CONS_INDEX 0
> +#define CONFIG_BAUDRATE 115200 /* Default baud rate */
> +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
> +
> +/*
> + * MMC Driver
> + */
> +#define CONFIG_ENV_IS_IN_MMC
> +#define CONFIG_ENV_OFFSET (256 * 1024)
> +#define CONFIG_ENV_SIZE (16 * 1024)
> +#define CONFIG_SYS_MMC_ENV_DEV 0
> +#define CONFIG_CMD_SAVEENV
> +#ifdef CONFIG_CMD_MMC
> +#define CONFIG_MMC
> +#define CONFIG_GENERIC_MMC
> +#define CONFIG_MXS_MMC
> +#endif
> +
> +/*
> + * Ethernet on SOC (FEC)
> + */
> +#ifdef CONFIG_CMD_NET
> +#define CONFIG_NET_MULTI
> +#define CONFIG_ETHPRIME "FEC0"
> +#define CONFIG_FEC_MXC
> +#define CONFIG_FEC_MXC_MULTI
> +#define CONFIG_MII
> +#define CONFIG_DISCOVER_PHY
> +#define CONFIG_FEC_XCV_TYPE RMII
> +#define CONFIG_MX28_FEC_MAC_IN_OCOTP
> +#endif
> +
> +/*
> + * Boot Linux
> + */
> +#define CONFIG_CMDLINE_TAG
> +#define CONFIG_SETUP_MEMORY_TAGS
> +#define CONFIG_BOOTDELAY 3
> +#define CONFIG_BOOTFILE "uImage"
> +#define CONFIG_BOOTCOMMAND "run bootcmd_net"
> +#define CONFIG_LOADADDR 0x42000000
> +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
> +
> +/*
> + * Extra Environments
> + */
> +#define CONFIG_EXTRA_ENV_SETTINGS \
> + "console_fsl=console=ttyAM0" \
> + "console_mainline=console=ttyAMA0" \
> + "netargs=setenv bootargs console=${console_mainline}" \
> + "root=/dev/nfs " \
> + "ip=dhcp nfsroot=${serverip}:${nfsroot}\0" \
> + "bootcmd_net=echo Booting from net ...; " \
> + "run netargs; " \
> + "dhcp ${uimage}; bootm\0" \
> +
> +#endif /* __CONFIG_H */
Acked-by: Marek Vasut <marek.vasut at gmail.com>
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