[U-Boot] [PATCH] atmel nand patch CE don't care NAND

Michael Trimarchi trimarchi at gandalf.sssup.it
Tue Feb 8 21:56:19 CET 2011


Hi

On 02/08/2011 09:42 PM, Scott Wood wrote:
> On Tue, 8 Feb 2011 14:29:21 -0600
> Scott Wood <scottwood at freescale.com> wrote:
> 
>> On Wed, Feb 02, 2011 at 04:11:29PM +0100, Michael Trimarchi wrote:
>>> diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
>>> index ab8bbb3..bda117a 100644
>>> --- a/drivers/mtd/nand/atmel_nand.c
>>> +++ b/drivers/mtd/nand/atmel_nand.c
>>> @@ -249,8 +249,13 @@ static void at91_nand_hwcontrol(struct mtd_info *mtd,
>>>  		if (ctrl & NAND_ALE)
>>>  			IO_ADDR_W |= CONFIG_SYS_NAND_MASK_ALE;
>>>  
>>> +		/*
>>> +		 * Nand CS don't care doesn't need the enable pin
>>> +		 */
>>> +#ifdef CONFIG_SYS_NAND_ENABLE_PIN
>>>  		at91_set_gpio_value(CONFIG_SYS_NAND_ENABLE_PIN,
>>>  				    !(ctrl & NAND_NCE));
>>> +#endif
>>
>> New CONFIG symbols need to be documented, and this particular one should
>> probably be less generic.
> 
> Sorry, ignore that -- I see it's not new (it should still be documented,
> but that's not this patch's problem).

too late :(

> 
> The code change itself looks OK, just needs a better commit
> message/comment. Some googling indicates that "CE don't care" refers to the
> ability to deassert the chip enable line once an operation has been
> initiated.  This seems to be different from not having control of CE at all
> (is it just always asserted on these boards?).

It is connected to the CS3.

> 
> -Scott
> 

Regards
Michael
> 



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