[U-Boot] [PATCH] updated at91sam9263 port

Uli Raich Uli.Raich at cern.ch
Fri Feb 25 14:05:21 CET 2011


The at91sam9263ek port is updated to the level of the at91sam9260ek port

Signed-off-by: Uli Raich <uli.raich at cern.ch>
---
 Makefile                                          |   19 ---
 arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c |   32 +++---
 arch/arm/include/asm/arch-at91/at91sam9263.h      |   17 ++-
 board/atmel/at91sam9263ek/at91sam9263ek.c         |  125 ++++++++++--------
 board/atmel/at91sam9263ek/led.c                   |   19 +--
 boards.cfg                                        |    6 +
 include/configs/at91sam9263ek.h                   |  146 ++++++++++++---------
 7 files changed, 196 insertions(+), 168 deletions(-)

diff --git a/Makefile b/Makefile
index 770fb0d..94283cc 100644
--- a/Makefile
+++ b/Makefile
@@ -782,25 +782,6 @@ at91sam9g10ek_config	:	unconfig
 	fi;
 	@$(MKCONFIG) -n $@ -a at91sam9261ek arm arm926ejs at91sam9261ek atmel at91
 
-at91sam9263ek_norflash_config \
-at91sam9263ek_norflash_boot_config \
-at91sam9263ek_nandflash_config \
-at91sam9263ek_dataflash_config \
-at91sam9263ek_dataflash_cs0_config \
-at91sam9263ek_config	:	unconfig
-	@mkdir -p $(obj)include
-	@if [ "$(findstring _nandflash,$@)" ] ; then \
-		echo "#define CONFIG_SYS_USE_NANDFLASH 1"	>>$(obj)include/config.h ; \
-	elif [ "$(findstring norflash,$@)" ] ; then \
-		echo "#define CONFIG_SYS_USE_NORFLASH 1"	>>$(obj)include/config.h ; \
-	else \
-		echo "#define CONFIG_SYS_USE_DATAFLASH 1"	>>$(obj)include/config.h ; \
-	fi;
-	@if [ "$(findstring norflash_boot,$@)" ] ; then \
-		echo "#define CONFIG_SYS_USE_BOOT_NORFLASH 1"	>>$(obj)include/config.h ; \
-	fi;
-	@$(MKCONFIG) -n $@ -a at91sam9263ek arm arm926ejs at91sam9263ek atmel at91
-
 at91sam9rlek_nandflash_config \
 at91sam9rlek_dataflash_config \
 at91sam9rlek_dataflash_cs0_config \
diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c
index deda3e5..ba00311 100644
--- a/arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c
+++ b/arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c
@@ -28,45 +28,45 @@
 
 #include <common.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/io.h>
+#include <asm/io.h>
 #include <asm/arch/at91_common.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_pio.h>
 
 void at91_serial0_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_a_periph(AT91_PIO_PORTA, 26, 1);		/* TXD0 */
 	at91_set_a_periph(AT91_PIO_PORTA, 27, 0);		/* RXD0 */
-	writel(1 << AT91SAM9263_ID_US0, &pmc->pcer);
+	writel(1 << ATMEL_ID_USART0, &pmc->pcer);
 }
 
 void at91_serial1_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_a_periph(AT91_PIO_PORTD, 0, 1);		/* TXD1 */
 	at91_set_a_periph(AT91_PIO_PORTD, 1, 0);		/* RXD1 */
-	writel(1 << AT91SAM9263_ID_US1, &pmc->pcer);
+	writel(1 << ATMEL_ID_USART1, &pmc->pcer);
 }
 
 void at91_serial2_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_a_periph(AT91_PIO_PORTD, 2, 1);		/* TXD2 */
 	at91_set_a_periph(AT91_PIO_PORTD, 3, 0);		/* RXD2 */
-	writel(1 << AT91SAM9263_ID_US2, &pmc->pcer);
+	writel(1 << ATMEL_ID_USART2, &pmc->pcer);
 }
 
-void at91_serial3_hw_init(void)
+void at91_seriald_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_a_periph(AT91_PIO_PORTC, 30, 0);		/* DRXD */
 	at91_set_a_periph(AT91_PIO_PORTC, 31, 1);		/* DTXD */
-	writel(1 << AT91_ID_SYS, &pmc->pcer);
+	writel(1 << ATMEL_ID_SYS, &pmc->pcer);
 }
 
 void at91_serial_hw_init(void)
@@ -91,14 +91,14 @@ void at91_serial_hw_init(void)
 #ifdef CONFIG_HAS_DATAFLASH
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_b_periph(AT91_PIO_PORTA, 0, 0);	/* SPI0_MISO */
 	at91_set_b_periph(AT91_PIO_PORTA, 1, 0);	/* SPI0_MOSI */
 	at91_set_b_periph(AT91_PIO_PORTA, 2, 0);	/* SPI0_SPCK */
 
 	/* Enable clock */
-	writel(1 << AT91SAM9263_ID_SPI0, &pmc->pcer);
+	writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
 
 	if (cs_mask & (1 << 0)) {
 		at91_set_b_periph(AT91_PIO_PORTA, 5, 1);
@@ -128,14 +128,14 @@ void at91_spi0_hw_init(unsigned long cs_mask)
 
 void at91_spi1_hw_init(unsigned long cs_mask)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_a_periph(AT91_PIO_PORTB, 12, 0);	/* SPI1_MISO */
 	at91_set_a_periph(AT91_PIO_PORTB, 13, 0);	/* SPI1_MOSI */
 	at91_set_a_periph(AT91_PIO_PORTB, 14, 0);	/* SPI1_SPCK */
 
 	/* Enable clock */
-	writel(1 << AT91SAM9263_ID_SPI1, &pmc->pcer);
+	writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
 
 	if (cs_mask & (1 << 0)) {
 		at91_set_a_periph(AT91_PIO_PORTB, 15, 1);
@@ -203,12 +203,12 @@ void at91_uhp_hw_init(void)
 #ifdef CONFIG_AT91_CAN
 void at91_can_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_a_periph(AT91_PIO_PORTA, 13, 0);	/* CAN_TX */
 	at91_set_a_periph(AT91_PIO_PORTA, 14, 1);	/* CAN_RX */
 
 	/* Enable clock */
-	writel(1 << AT91SAM9263_ID_CAN, &pmc->pcer);
+	writel(1 << ATMEL_ID_CAN, &pmc->pcer);
 }
 #endif
diff --git a/arch/arm/include/asm/arch-at91/at91sam9263.h b/arch/arm/include/asm/arch-at91/at91sam9263.h
index 51cdd83..7e0d83a 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9263.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9263.h
@@ -20,7 +20,6 @@
 /*
  * defines to be used in other places
  */
-#define CONFIG_ARM926EJS	/* ARM926EJS Core */
 #define CONFIG_AT91FAMILY	/* it's a member of AT91 */
 
 /*
@@ -30,7 +29,7 @@
 #define ATMEL_ID_SYS	1	/* System Peripherals */
 #define ATMEL_ID_PIOA	2	/* Parallel IO Controller A */
 #define ATMEL_ID_PIOB	3	/* Parallel IO Controller B */
-#define ATMEL_ID_PIOCDE	4	/* Parallel IO Controller C, D and E */
+#define ATMEL_ID_PIOC	4	/* Parallel IO Controller C, D and E */
 /* Reserved:		5 */
 /* Reserved:		6 */
 #define ATMEL_ID_USART0	7	/* USART 0 */
@@ -131,10 +130,22 @@
 #define ATMEL_BASE_UHP		0x00a00000	/* USB Host controller */
 
 /*
+ * External memory
+ */
+#define ATMEL_BASE_CS0		0x10000000	/* typically NOR */
+#define ATMEL_BASE_CS1		0x20000000	/* SDRAM */
+#define ATMEL_BASE_CS2		0x30000000
+#define ATMEL_BASE_CS3		0x40000000	/* typically NAND */
+#define ATMEL_BASE_CS4		0x50000000
+#define ATMEL_BASE_CS5		0x60000000
+#define ATMEL_BASE_CS6		0x70000000
+#define ATMEL_BASE_CS7		0x80000000
+
+/*
  * Other misc defines
  */
 #define ATMEL_PIO_PORTS		5		/* this SoCs has 5 PIO */
-
+#define ATMEL_PMC_UHP		AT91SAM926x_PMC_UHP
 /*
  * Cpu Name
  */
diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c
index 91efc07..d879ced 100644
--- a/board/atmel/at91sam9263ek/at91sam9263ek.c
+++ b/board/atmel/at91sam9263ek/at91sam9263ek.c
@@ -23,17 +23,16 @@
  */
 
 #include <common.h>
-#include <asm/sizes.h>
-#include <asm/arch/at91sam9263.h>
+#include <mmc.h>
+#include <asm/io.h>
+#include <asm/arch/at91sam9260_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
-#include <asm/arch/at91_matrix.h>
-#include <asm/arch/at91_pio.h>
+#include <asm/arch/gpio.h>
 #include <asm/arch/clk.h>
-#include <asm/arch/io.h>
-#include <asm/arch/hardware.h>
+
 #include <lcd.h>
 #include <atmel_lcdc.h>
 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
@@ -51,26 +50,22 @@ DECLARE_GLOBAL_DATA_PTR;
 #ifdef CONFIG_CMD_NAND
 static void at91sam9263ek_nand_hw_init(void)
 {
+	struct at91_smc    *smc    = (struct at91_smc *) ATMEL_BASE_SMC0;
+	struct at91_matrix *matrix = (struct at91_matrix *) ATMEL_BASE_MATRIX;
 	unsigned long csa;
-	at91_smc_t 	*smc 	= (at91_smc_t *) AT91_SMC0_BASE;
-	at91_matrix_t 	*matrix = (at91_matrix_t *) AT91_MATRIX_BASE;
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
-
-	/* Enable CS3 */
-	csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
-	writel(csa, &matrix->csa[0]);
 
-	/* Enable CS3 */
+	/* Assign CS3 to NAND/SmartMedia Interface */
+	csa = readl(&matrix->ebicsa);
+	csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
+	writel(csa, &matrix->ebicsa);
 
 	/* Configure SMC CS3 for NAND/SmartMedia */
 	writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
 		AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
 		&smc->cs[3].setup);
-
 	writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
 		AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
 		&smc->cs[3].pulse);
-
 	writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
 		&smc->cs[3].cycle);
 	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
@@ -83,26 +78,24 @@ static void at91sam9263ek_nand_hw_init(void)
 		       AT91_SMC_MODE_TDF_CYCLE(2),
 		&smc->cs[3].mode);
 
-	writel(1 << AT91SAM9263_ID_PIOA | 1 << AT91SAM9263_ID_PIOCDE,
-		&pmc->pcer);
-
 	/* Configure RDY/BSY */
-	at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);
+	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
 
 	/* Enable NandFlash */
-	at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+	at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
 }
 #endif
 
 #ifdef CONFIG_MACB
 static void at91sam9263ek_macb_hw_init(void)
 {
+	struct at91_pmc	*pmc	= (struct at91_pmc *) ATMEL_BASE_PMC;
+	struct at91_port *pioa	= (struct at91_port *) ATMEL_BASE_PIOA;
+	struct at91_rstc *rstc	= (struct at91_rstc *) ATMEL_BASE_RSTC;
 	unsigned long 	erstl;
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
-	at91_pio_t	*pio	= (at91_pio_t *) AT91_PIO_BASE;
-	at91_rstc_t	*rstc	= (at91_rstc_t *) AT91_RSTC_BASE;
+
 	/* Enable clock */
-	writel(1 << AT91SAM9263_ID_EMAC, &pmc->pcer);
+	writel(1 <<  ATMEL_ID_EMAC, &pmc->pcer);
 
 	/*
 	 * Disable pull-up on:
@@ -113,8 +106,13 @@ static void at91sam9263ek_macb_hw_init(void)
 	 * PHY has internal pull-down
 	 */
 
-	writel(1 << 25, &pio->pioc.pudr);
-	writel((1 << 25) | (1 <<26), &pio->pioe.pudr);
+	writel(pin_to_mask(AT91_PIN_PA14) |
+		pin_to_mask(AT91_PIN_PA15) |
+		pin_to_mask(AT91_PIN_PA17) |
+		pin_to_mask(AT91_PIN_PA25) |
+		pin_to_mask(AT91_PIN_PA26) |
+		pin_to_mask(AT91_PIN_PA28),
+		&pioa->pudr);
 
 	erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
 
@@ -131,8 +129,13 @@ static void at91sam9263ek_macb_hw_init(void)
 	writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr);
 
 	/* Re-enable pull-up */
-	writel(1 << 25, &pio->pioc.puer);
-	writel((1 << 25) | (1 <<26), &pio->pioe.puer);
+	writel(pin_to_mask(AT91_PIN_PA14) |
+		pin_to_mask(AT91_PIN_PA15) |
+		pin_to_mask(AT91_PIN_PA17) |
+		pin_to_mask(AT91_PIN_PA25) |
+		pin_to_mask(AT91_PIN_PA26) |
+		pin_to_mask(AT91_PIN_PA28),
+		&pioa->puer);
 
 	at91_macb_hw_init();
 }
@@ -140,35 +143,34 @@ static void at91sam9263ek_macb_hw_init(void)
 
 #ifdef CONFIG_LCD
 vidinfo_t panel_info = {
-	vl_col:		240,
-	vl_row:		320,
-	vl_clk:		4965000,
-	vl_sync:	ATMEL_LCDC_INVLINE_INVERTED |
-			ATMEL_LCDC_INVFRAME_INVERTED,
-	vl_bpix:	3,
-	vl_tft:		1,
-	vl_hsync_len:	5,
-	vl_left_margin:	1,
-	vl_right_margin:33,
-	vl_vsync_len:	1,
-	vl_upper_margin:1,
-	vl_lower_margin:0,
-	mmio:		AT91SAM9263_LCDC_BASE,
+vl_col: 	  240,
+vl_row :	  320,
+vl_clk :	  4965000,
+vl_sync :	  ATMEL_LCDC_INVLINE_INVERTED | ATMEL_LCDC_INVFRAME_INVERTED,
+vl_bpix :	  3,
+vl_tft :	  1,
+vl_hsync_len :	  5,
+vl_left_margin :  1,
+vl_right_margin : 33,
+vl_vsync_len :	  1,
+vl_upper_margin : 1,
+vl_lower_margin : 0,
+mmio :		  ATMEL_BASE_LCDC
 };
 
 void lcd_enable(void)
 {
-	at91_set_pio_value(AT91_PIO_PORTA, 30, 1);  /* power up */
+	at91_set_gpio_value(AT91_PIN_PA30, 1);  /* power up */
 }
 
 void lcd_disable(void)
 {
-	at91_set_pio_value(AT91_PIO_PORTA, 30, 0);  /* power down */
+	at91_set_gpio_value(AT91_PIN_PA30, 0);  /* power down */
 }
 
 static void at91sam9263ek_lcd_hw_init(void)
 {
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) ATMEL_BASE_PMC;
 
 	at91_set_a_periph(AT91_PIO_PORTC, 1, 0);	/* LCDHSYNC */
 	at91_set_a_periph(AT91_PIO_PORTC, 2, 0);	/* LCDDOTCK */
@@ -193,8 +195,8 @@ static void at91sam9263ek_lcd_hw_init(void)
 	at91_set_a_periph(AT91_PIO_PORTC, 26, 0);	/* LCDD22 */
 	at91_set_a_periph(AT91_PIO_PORTC, 27, 0);	/* LCDD23 */
 
-	writel(1 << AT91SAM9263_ID_LCDC, &pmc->pcer);
-	gd->fb_base = AT91SAM9263_SRAM0_BASE;
+	writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
+	gd->fb_base = ATMEL_BASE_SRAM0;
 }
 
 #ifdef CONFIG_LCD_INFO
@@ -218,7 +220,7 @@ void lcd_show_board_info(void)
 	lcd_printf ("(C) 2008 ATMEL Corp\n");
 	lcd_printf ("at91support at atmel.com\n");
 	lcd_printf ("%s CPU at %s MHz\n",
-		CONFIG_SYS_AT91_CPU_NAME,
+		ATMEL_CPU_NAME,
 		strmhz(temp, get_cpu_clk_rate()));
 
 	dram_size = 0;
@@ -244,6 +246,18 @@ void lcd_show_board_info(void)
 #endif /* CONFIG_LCD_INFO */
 #endif
 
+int board_early_init_f(void)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+
+	/* Enable clocks for all PIOs */
+	writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
+	       (1 << ATMEL_ID_PIOC),
+	       &pmc->pcer);
+
+	return 0;
+}
+
 int board_init(void)
 {
 	/* Enable Ctrlc */
@@ -252,14 +266,14 @@ int board_init(void)
 	/* arch number of AT91SAM9263EK-Board */
 	gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9263EK;
 	/* adress of boot parameters */
-	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 
-	at91_serial_hw_init();
+	at91_seriald_hw_init();
 #ifdef CONFIG_CMD_NAND
 	at91sam9263ek_nand_hw_init();
 #endif
 #ifdef CONFIG_HAS_DATAFLASH
-	at91_set_pio_output(AT91_PIO_PORTE, 20, 1);	/* select spi0 clock */
+	at91_set_gpio_output(AT91_PIN_PE20, 1);	/* select spi0 clock */
 	at91_spi0_hw_init(1 << 0);
 #endif
 #ifdef CONFIG_MACB
@@ -276,8 +290,9 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->bd->bi_dram[0].start = PHYS_SDRAM;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+	gd->ram_size = get_ram_size(
+		(void *)CONFIG_SYS_SDRAM_BASE,
+		CONFIG_SYS_SDRAM_SIZE);
 	return 0;
 }
 
@@ -291,7 +306,7 @@ int board_eth_init(bd_t *bis)
 {
 	int rc = 0;
 #ifdef CONFIG_MACB
-	rc = macb_eth_initialize(0, (void *) AT91_EMAC_BASE, 0x00);
+	rc = macb_eth_initialize(0, (void *) ATMEL_BASE_EMAC, 0x00);
 #endif
 	return rc;
 }
diff --git a/board/atmel/at91sam9263ek/led.c b/board/atmel/at91sam9263ek/led.c
index fa1f05b..8eefe1c 100644
--- a/board/atmel/at91sam9263ek/led.c
+++ b/board/atmel/at91sam9263ek/led.c
@@ -27,21 +27,14 @@
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_pio.h>
 #include <asm/arch/gpio.h>
-#include <asm/arch/io.h>
+#include <asm/io.h>
 
 void coloured_LED_init(void)
 {
-	/* Enable clock */
-	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+	/* Clock is enabled in board_early_init_f() */
+	at91_set_gpio_output(CONFIG_RED_LED, 1);
+	at91_set_gpio_output(CONFIG_GREEN_LED, 1);
 
-	writel(1 << AT91SAM9263_ID_PIOB | 1 << AT91SAM9263_ID_PIOCDE,
-		&pmc->pcer);
-
-	at91_set_pio_output(CONFIG_RED_LED, 1);
-	at91_set_pio_output(CONFIG_GREEN_LED, 1);
-	at91_set_pio_output(CONFIG_YELLOW_LED, 1);
-
-	at91_set_pio_value(CONFIG_RED_LED, 0);
-	at91_set_pio_value(CONFIG_GREEN_LED, 1);
-	at91_set_pio_value(CONFIG_YELLOW_LED, 1);
+	at91_set_gpio_value(CONFIG_RED_LED, 0);
+	at91_set_gpio_value(CONFIG_GREEN_LED, 1);
 }
diff --git a/boards.cfg b/boards.cfg
index 0da32ef..b643d04 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -76,6 +76,12 @@ at91cap9adk                  arm         arm926ejs   -                   atmel
 at91sam9260ek_nandflash      arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9260,SYS_USE_NANDFLASH
 at91sam9260ek_dataflash_cs0  arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS0
 at91sam9260ek_dataflash_cs1  arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS1
+at91sam9263ek_norflash	     arm	 arm926ejs   at91sam9263ek	 atmel		at91	    at91sam9263ek:AT91SAM9263,SYS_USE_NORFLASH
+at91sam9263ek_norflash_boot  arm	 arm926ejs   at91sam9263ek	 atmel		at91	    at91sam9263ek:AT91SAM9263,SYS_USE_BOOT_NORFLASH
+at91sam9263ek_nandflash      arm	 arm926ejs   at91sam9263ek	 atmel		at91	    at91sam9263ek:AT91SAM9263,SYS_USE_NANDFLASH
+at91sam9263ek_dataflash      arm	 arm926ejs   at91sam9263ek	 atmel		at91	    at91sam9263ek:AT91SAM9263,SYS_USE_DATAFLASH
+at91sam9263ek_dataflash_cs0  arm	 arm926ejs   at91sam9263ek	 atmel		at91	    at91sam9263ek:AT91SAM9263,SYS_USE_DATAFLASH_CS0
+at91sam9263ek  		     arm	 arm926ejs   at91sam9263ek	 atmel		at91	    at91sam9263ek:AT91SAM9263
 at91sam9g20ek_nandflash      arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9G20,SYS_USE_NANDFLASH
 at91sam9g20ek_dataflash_cs0  arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS0
 at91sam9g20ek_dataflash_cs1  arm         arm926ejs   at91sam9260ek       atmel          at91        at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS1
diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index f6cb406..d3d22b0 100644
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -26,62 +26,71 @@
 
 #ifndef __CONFIG_H
 #define __CONFIG_H
+/*
+ * SoC must be defined first, before hardware.h is included.
+ * In this case SoC is defined in boards.cfg.
+ */
+#include <asm/hardware.h>
 
 /* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
 #define CONFIG_SYS_AT91_MAIN_CLOCK	16367660	/* 16.367 MHz crystal */
 #define CONFIG_SYS_HZ		1000
 
-#define CONFIG_ARM926EJS	1	/* This is an ARM926EJS Core	*/
-#define CONFIG_AT91SAM9263	1	/* It's an Atmel AT91SAM9263 SoC*/
-#define CONFIG_AT91SAM9263EK	1	/* on an AT91SAM9263EK Board	*/
+#define CONFIG_ARM926EJS		/* This is an ARM926EJS Core	*/
+#define CONFIG_AT91SAM9263EK		/* on an AT91SAM9263EK Board	*/
 #define CONFIG_ARCH_CPU_INIT
-#undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
-
-#define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs	*/
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG	1
-
-#ifndef CONFIG_SYS_USE_BOOT_NORFLASH
+#undef CONFIG_USE_IRQ
+			/* we don't need IRQ/FIQ stuff	*/
+/* Misc CPU related */
+#define CONFIG_ARCH_CPU_INIT
+#undef	CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
+#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs	*/
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
-
-/*
- * Hardware drivers
- */
-#define CONFIG_AT91_GPIO	1
-#define CONFIG_ATMEL_USART	1
-#undef CONFIG_USART0
-#undef CONFIG_USART1
-#undef CONFIG_USART2
-#define CONFIG_USART3		1	/* USART 3 is DBGU */
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_DISPLAY_CPUINFO
+
+/* general purpose I/O */
+#define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
+#define CONFIG_AT91_GPIO
+#define CONFIG_AT91_GPIO_PULLUP	1	/* keep pullups on peripheral pins */
+
+/* serial console */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
+#define	CONFIG_USART_ID			ATMEL_ID_SYS
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
 
 /* LCD */
-#define CONFIG_LCD			1
+#define CONFIG_LCD
 #define LCD_BPP				LCD_COLOR8
-#define CONFIG_LCD_LOGO			1
+#define CONFIG_LCD_LOGO
 #undef LCD_TEST_PATTERN
-#define CONFIG_LCD_INFO			1
-#define CONFIG_LCD_INFO_BELOW_LOGO	1
-#define CONFIG_SYS_WHITE_ON_BLACK		1
-#define CONFIG_ATMEL_LCD		1
-#define CONFIG_ATMEL_LCD_BGR555		1
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV		1
+#define CONFIG_LCD_INFO
+#define CONFIG_LCD_INFO_BELOW_LOGO
+#define CONFIG_SYS_WHITE_ON_BLACK
+#define CONFIG_ATMEL_LCD
+#define CONFIG_ATMEL_LCD_BGR555
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
 
 /* LED */
 #define CONFIG_AT91_LED
-#define	CONFIG_RED_LED		AT91_PIO_PORTB, 7	/* the power led */
-#define	CONFIG_GREEN_LED	AT91_PIO_PORTB, 8	/* the user1 led */
-#define	CONFIG_YELLOW_LED	AT91_PIO_PORTC, 29	/* the user2 led */
+#define	CONFIG_RED_LED		AT91_PIN_PB7	/* the power led */
+#define	CONFIG_GREEN_LED	AT91_PIN_PB8	/* the user1 led */
+#define	CONFIG_YELLOW_LED	AT91_PIN_PC29	/* the user2 led */
 
 #define CONFIG_BOOTDELAY	3
 
 /*
  * BOOTP options
  */
-#define CONFIG_BOOTP_BOOTFILESIZE	1
-#define CONFIG_BOOTP_BOOTPATH		1
-#define CONFIG_BOOTP_GATEWAY		1
-#define CONFIG_BOOTP_HOSTNAME		1
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
 
 /*
  * Command line configuration.
@@ -94,19 +103,32 @@
 #undef CONFIG_CMD_LOADS
 #undef CONFIG_CMD_SOURCE
 
-#define CONFIG_CMD_PING		1
-#define CONFIG_CMD_DHCP		1
-#define CONFIG_CMD_NAND		1
-#define CONFIG_CMD_USB		1
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_USB
 
 /* SDRAM */
 #define CONFIG_NR_DRAM_BANKS		1
-#define PHYS_SDRAM			0x20000000
-#define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */
+#define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
+#define CONFIG_SYS_SDRAM_SIZE		0x04000000
+
+/*
+ * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
+ * leaving the correct space for initial global data structure above
+ * that address while providing maximum stack area below.
+ */
+#ifdef CONFIG_AT91SAM9XE
+# define CONFIG_SYS_INIT_SP_ADDR \
+	(ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
+#else
+# define CONFIG_SYS_INIT_SP_ADDR \
+	(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
+#endif
 
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
-#define CONFIG_HAS_DATAFLASH		1
+#define CONFIG_HAS_DATAFLASH
 #define CONFIG_SYS_SPI_WRITE_TOUT		(5*CONFIG_SYS_HZ)
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS		1
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
@@ -126,7 +148,7 @@
 #define CONFIG_SYS_MONITOR_SEC	1:0-3
 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_MONITOR_LEN	(256 << 10)
-#define CONFIG_ENV_IS_IN_FLASH	1
+#define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + 0x007FE000)
 #define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR - CONFIG_ENV_SIZE)
 
@@ -247,7 +269,7 @@
 #endif
 
 #else
-#define CONFIG_SYS_NO_FLASH			1
+#define CONFIG_SYS_NO_FLASH
 #endif
 
 /* NAND flash */
@@ -260,8 +282,8 @@
 #define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
 /* our CLE is AD22 */
 #define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
-#define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIO_PORTD, 15
-#define CONFIG_SYS_NAND_READY_PIN	AT91_PIO_PORTA, 22
+#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PD15
+#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PA22
 /*
 #define CONFIG_SYS_NAND_ENABLE_PIN  AT91_PIN_PD15
 #define CONFIG_SYS_NAND_READY_PIN  AT91_PIN_PA22
@@ -272,32 +294,32 @@
 #endif
 
 /* Ethernet */
-#define CONFIG_MACB			1
-#define CONFIG_RMII			1
-#define CONFIG_NET_MULTI		1
+#define CONFIG_MACB
+#define CONFIG_RMII
+#define CONFIG_NET_MULTI
 #define CONFIG_NET_RETRY_COUNT		20
-#define CONFIG_RESET_PHY_R		1
+#define CONFIG_RESET_PHY_R
 
 /* USB */
 #define CONFIG_USB_ATMEL
-#define CONFIG_USB_OHCI_NEW		1
-#define CONFIG_DOS_PARTITION		1
-#define CONFIG_SYS_USB_OHCI_CPU_INIT		1
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_DOS_PARTITION
+#define CONFIG_SYS_USB_OHCI_CPU_INIT
 #define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00a00000	/* AT91SAM9263_UHP_BASE */
 #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9263"
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
-#define CONFIG_USB_STORAGE		1
-#define CONFIG_CMD_FAT			1
+#define CONFIG_USB_STORAGE
+#define CONFIG_CMD_FAT
 
 #define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
 
-#define CONFIG_SYS_MEMTEST_START		PHYS_SDRAM
+#define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END			0x23e00000
 
-#ifdef CONFIG_SYS_USE_DATAFLASH
+#ifdef CONFIG_SYS_USE_DATAFLASH_CS0
 
 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
-#define CONFIG_ENV_IS_IN_DATAFLASH	1
+#define CONFIG_ENV_IS_IN_DATAFLASH
 #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
 #define CONFIG_ENV_OFFSET		0x4200
 #define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
@@ -311,7 +333,7 @@
 #elif CONFIG_SYS_USE_NANDFLASH
 
 /* bootstrap + u-boot + env + linux in nandflash */
-#define CONFIG_ENV_IS_IN_NAND	1
+#define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_OFFSET		0x60000
 #define CONFIG_ENV_OFFSET_REDUND	0x80000
 #define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
@@ -330,8 +352,8 @@
 #define CONFIG_SYS_CBSIZE		256
 #define CONFIG_SYS_MAXARGS		16
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP		1
-#define CONFIG_CMDLINE_EDITING	1
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CMDLINE_EDITING
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_HUSH_PARSER
 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
-- 
1.7.1



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