[U-Boot] [PATCH V2 3/5] nand spl: add NAND Library to new SPL
Andreas Bießmann
andreas.devel at googlemail.com
Tue Jul 26 07:59:36 CEST 2011
Dear Simon,
Am 25.07.2011 um 20:05 schrieb Simon Schwarz:
> Insert some NAND driver sources into NAND SPL library.
>
> ---
> V1 changes:
> CHG Default to HW ecc in SPL build
> ADD nand_read_buf16 function, read buffer
> ADD omap_dev_ready function, indicte if chip is ready
>
> V2 changes:
> DEL GPMC_WAIT0_PIN_ACTIVE define
> CHG omap_dev_ready() renamed to omap_spl_dev_ready(), does not use the
> GPMC_WAIT0_PIN_ACTIVE-define anymore
> CHG ogpmc_read_buf16 renamed omap_spl_read_buf16
> ADD omap_spl_read_buf, 8x buf read function
> ADD CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to SPL
> CHG cosmetic
> CHG nand_base and nand_bbt aren't needed for SPL anymore
> CHG omap_nand_switch_ecc is not compiled for SPL
> ADD entry for CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to README.SPL
>
> Transition from V1 to V2 also includes that this patch is now based on
> - the new SPL layout by Aneesh V and Daniel Schwierzeck
> - the OMAP4 SPL patches by Aneesh V
>
> This Patch is related to "[U-Boot,4/5] devkit8000 nand_spl: Add SPL NAND support
> to omap_gpmc driver"
> (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102115) in V1
>
> Signed-off-by: Simon Schwarz <simonschwarzcor at gmail.com>
> ---
> doc/README.SPL | 2 +
> drivers/mtd/nand/Makefile | 6 +++-
> drivers/mtd/nand/omap_gpmc.c | 69 ++++++++++++++++++++++++++++++++++++++++++
> spl/Makefile | 2 +
> 4 files changed, 78 insertions(+), 1 deletions(-)
<snip>
> --- a/drivers/mtd/nand/omap_gpmc.c
> +++ b/drivers/mtd/nand/omap_gpmc.c
> @@ -61,6 +61,55 @@ static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t cmd,
> writeb(cmd, this->IO_ADDR_W);
> }
<snip>
> @@ -224,6 +273,8 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode)
> }
> }
>
> +
This single line is unnecessary.
> +#ifndef CONFIG_SPL_BUILD
> /*
> * omap_nand_switch_ecc - switch the ECC operation b/w h/w ecc and s/w ecc.
> * The default is to come up on s/w ecc
> @@ -280,6 +331,7 @@ void omap_nand_switch_ecc(int32_t hardware)
>
regards
Andreas Bießmann
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