[U-Boot] [u-boot-release] [PATCH 1/2] powerpc/mpc8xxx: Fix DDR3 timing_cfg_1 and sdram_mode registers

[Timur Tabi]

York Sun wrote:
> +	switch (wrrec_mclk) { /* DDR_SDRAM_MODE doesn't support 9,11,13,15 */
> +	case 9:
> +		wrrec_mclk = 10;
> +		break;
> +	case 11:
> +		wrrec_mclk = 12;
> +		break;
> +	case 13:
> +		wrrec_mclk = 14;
> +		break;
> +	case 16:

15?

> +		wrrec_mclk = 16;
> +		break;
> +	}

How about something simpler:

if (wrrec_mclk & 1)
	wrrec_mclk++;

-- 
Timur Tabi
Linux kernel developer at Freescale