[U-Boot] [u-boot-release] [PATCH 1/2] powerpc/mpc8xxx: Fix DDR3 timing_cfg_1 and sdram_mode registers

[York Sun]

On Wed, 2011-03-02 at 13:31 -0600, Timur Tabi wrote:
> York Sun wrote:
> > +	switch (wrrec_mclk) { /* DDR_SDRAM_MODE doesn't support 9,11,13,15 */
> > +	case 9:
> > +		wrrec_mclk = 10;
> > +		break;
> > +	case 11:
> > +		wrrec_mclk = 12;
> > +		break;
> > +	case 13:
> > +		wrrec_mclk = 14;
> > +		break;
> > +	case 16:
> 
> 15?


Nice catch. Thank you. I will submit a fixed version.

> > +		wrrec_mclk = 16;
> > +		break;
> > +	}
> 
> How about something simpler:
> 
> if (wrrec_mclk & 1)
> 	wrrec_mclk++;
> 

Only 9, 11, 13, 15 need to round up.

York