[U-Boot] [PATCH 1/9] arm926ej-s: Invalidate instruction cache in flush_cache
Michael Spang
mspang at csclub.uwaterloo.ca
Sun Mar 20 19:26:29 CET 2011
On 3/20/11, arden jay <arden.jay at gmail.com> wrote:
> Hi Michael,
>
> I still have question. :)
>
> When ARM fetch instruction, it firstly try cache.
> It then should have cache miss, and forces to reload the instruction
> from memory?
>
> Why it will have problem while U-boot & Kernel at the same memory location?
If the instruction fetch misses the cache, then it works fine. That's
why invalidating solves the problem. The problem is that it hits, but
returns the wrong instructions. The code from U-Boot is loaded into
the icache when U-Boot is started (before it is relocated) and some of
it is still in the icache when we execute linux. So the CPU ends up
fetching the wrong instructions.
On ARM if code is stored to RAM, then the modified addresses must be
manually invalidated in the instruction cache. The hardware does not
do this for us.
Michael
More information about the U-Boot
mailing list