[U-Boot] [PATCH V3 5/5] I2C: add i2c support for Armada100 platform

Prafulla Wadaskar prafulla at marvell.com
Tue Mar 22 12:40:26 CET 2011 


> -----Original Message-----
> From: Lei Wen [mailto:leiwen at marvell.com]
> Sent: Thursday, March 17, 2011 12:15 PM
> To: Heiko Schocher; Wolfgang Denk; Prafulla Wadaskar; u-
> boot at lists.denx.de; Marek Vasut; Ashish Karkare; Prabhanjan Sarnaik;
> adrian.wenl at gmail.com
> Subject: [PATCH V3 5/5] I2C: add i2c support for Armada100 platform
> 
> Signed-off-by: Lei Wen <leiwen at marvell.com>
> ---
> Changelog:
> V3:
> clean code sytle issue
> Add i2c clock enable code include in I2C configure define block
> 
>  arch/arm/cpu/arm926ejs/armada100/cpu.c    |   16 +++++++++++
>  arch/arm/include/asm/arch-armada100/mfp.h |   40 ++++++++++++++++------
> -------
>  board/Marvell/aspenite/aspenite.c         |    5 +++
>  include/configs/aspenite.h                |   12 ++++++++
>  4 files changed, 55 insertions(+), 18 deletions(-)
> 
> diff --git a/arch/arm/cpu/arm926ejs/armada100/cpu.c
> b/arch/arm/cpu/arm926ejs/armada100/cpu.c
> index 62aa175..c21938e 100644
> --- a/arch/arm/cpu/arm926ejs/armada100/cpu.c
> +++ b/arch/arm/cpu/arm926ejs/armada100/cpu.c
> @@ -62,6 +62,16 @@ int arch_cpu_init(void)
>  	/* Enable GPIO clock */
>  	writel(APBC_APBCLK, &apb1clkres->gpio);
> 
> +#ifdef CONFIG_I2C_MV
> +	/* Enable general I2C clock */
> +	writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi0);
> +	writel(APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi0);
> +
> +	/* Enable power I2C clock */
> +	writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi1);
> +	writel(APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi1);
> +#endif
> +
>  	/*
>  	 * Enable Functional and APB clock at 14.7456MHz
>  	 * for configured UART console
> @@ -90,3 +100,9 @@ int print_cpuinfo(void)
>  	return 0;
>  }
>  #endif
> +
> +#ifdef CONFIG_I2C_MV
> +void i2c_clk_enable(void)
> +{
> +}

Empty function, you can better ifdef calling line

> +#endif
> diff --git a/arch/arm/include/asm/arch-armada100/mfp.h
> b/arch/arm/include/asm/arch-armada100/mfp.h
> index d21a79f..73783a7 100644
> --- a/arch/arm/include/asm/arch-armada100/mfp.h
> +++ b/arch/arm/include/asm/arch-armada100/mfp.h
> @@ -37,28 +37,32 @@
>   * 				    offset, pull,pF, drv,dF, edge,eF ,afn,aF
>   */
>  /* UART1 */
> -#define MFP107_UART1_TXD	MFP_REG(0x01ac) | MFP_AF1 | MFP_DRIVE_FAST
> -#define MFP107_UART1_RXD	MFP_REG(0x01ac) | MFP_AF2 | MFP_DRIVE_FAST
> -#define MFP108_UART1_RXD	MFP_REG(0x01b0) | MFP_AF1 | MFP_DRIVE_FAST
> -#define MFP108_UART1_TXD	MFP_REG(0x01b0) | MFP_AF2 | MFP_DRIVE_FAST
> -#define MFP109_UART1_CTS	MFP_REG(0x01b4) | MFP_AF1 | MFP_DRIVE_MEDIUM
> -#define MFP109_UART1_RTS	MFP_REG(0x01b4) | MFP_AF2 | MFP_DRIVE_MEDIUM
> -#define MFP110_UART1_RTS	MFP_REG(0x01b8) | MFP_AF1 | MFP_DRIVE_MEDIUM
> -#define MFP110_UART1_CTS	MFP_REG(0x01b8) | MFP_AF2 | MFP_DRIVE_MEDIUM
> -#define MFP111_UART1_RI		MFP_REG(0x01bc) | MFP_AF1 |
> MFP_DRIVE_MEDIUM
> -#define MFP111_UART1_DSR	MFP_REG(0x01bc) | MFP_AF2 | MFP_DRIVE_MEDIUM
> -#define MFP112_UART1_DTR	MFP_REG(0x01c0) | MFP_AF1 | MFP_DRIVE_MEDIUM
> -#define MFP112_UART1_DCD	MFP_REG(0x01c0) | MFP_AF2 | MFP_DRIVE_MEDIUM
> +#define MFP107_UART1_TXD	(MFP_REG(0x01ac) | MFP_AF1 | MFP_DRIVE_FAST)
> +#define MFP107_UART1_RXD	(MFP_REG(0x01ac) | MFP_AF2 | MFP_DRIVE_FAST)
> +#define MFP108_UART1_RXD	(MFP_REG(0x01b0) | MFP_AF1 | MFP_DRIVE_FAST)
> +#define MFP108_UART1_TXD	(MFP_REG(0x01b0) | MFP_AF2 | MFP_DRIVE_FAST)
> +#define MFP109_UART1_CTS	(MFP_REG(0x01b4) | MFP_AF1 | MFP_DRIVE_MEDIUM)
> +#define MFP109_UART1_RTS	(MFP_REG(0x01b4) | MFP_AF2 | MFP_DRIVE_MEDIUM)
> +#define MFP110_UART1_RTS	(MFP_REG(0x01b8) | MFP_AF1 | MFP_DRIVE_MEDIUM)
> +#define MFP110_UART1_CTS	(MFP_REG(0x01b8) | MFP_AF2 | MFP_DRIVE_MEDIUM)
> +#define MFP111_UART1_RI		(MFP_REG(0x01bc) | MFP_AF1 |
> MFP_DRIVE_MEDIUM)
> +#define MFP111_UART1_DSR	(MFP_REG(0x01bc) | MFP_AF2 | MFP_DRIVE_MEDIUM)
> +#define MFP112_UART1_DTR	(MFP_REG(0x01c0) | MFP_AF1 | MFP_DRIVE_MEDIUM)
> +#define MFP112_UART1_DCD	(MFP_REG(0x01c0) | MFP_AF2 | MFP_DRIVE_MEDIUM)
> 
>  /* UART2 */
> -#define MFP47_UART2_RXD		MFP_REG(0x0028) | MFP_AF6 |
> MFP_DRIVE_MEDIUM
> -#define MFP48_UART2_TXD		MFP_REG(0x002c) | MFP_AF6 |
> MFP_DRIVE_MEDIUM
> -#define MFP88_UART2_RXD		MFP_REG(0x0160) | MFP_AF2 |
> MFP_DRIVE_MEDIUM
> -#define MFP89_UART2_TXD		MFP_REG(0x0164) | MFP_AF2 |
> MFP_DRIVE_MEDIUM
> +#define MFP47_UART2_RXD		(MFP_REG(0x0028) | MFP_AF6 |
> MFP_DRIVE_MEDIUM)
> +#define MFP48_UART2_TXD		(MFP_REG(0x002c) | MFP_AF6 |
> MFP_DRIVE_MEDIUM)
> +#define MFP88_UART2_RXD		(MFP_REG(0x0160) | MFP_AF2 |
> MFP_DRIVE_MEDIUM)
> +#define MFP89_UART2_TXD		(MFP_REG(0x0164) | MFP_AF2 |
> MFP_DRIVE_MEDIUM)
> 
>  /* UART3 */
> -#define MFPO8_UART3_RXD		MFP_REG(0x06c) | MFP_AF2 |
> MFP_DRIVE_MEDIUM
> -#define MFPO9_UART3_TXD		MFP_REG(0x070) | MFP_AF2 |
> MFP_DRIVE_MEDIUM
> +#define MFPO8_UART3_RXD		(MFP_REG(0x06c) | MFP_AF2 |
> MFP_DRIVE_MEDIUM)
> +#define MFPO9_UART3_TXD		(MFP_REG(0x070) | MFP_AF2 |
> MFP_DRIVE_MEDIUM)
> +
> +/* I2c */
> +#define MFP105_CI2C_SDA		(MFP_REG(0x1a4) | MFP_AF1 |
> MFP_DRIVE_MEDIUM)
> +#define MFP106_CI2C_SCL		(MFP_REG(0x1a8) | MFP_AF1 |
> MFP_DRIVE_MEDIUM)
> 
>  /* More macros can be defined here... */
> 
> diff --git a/board/Marvell/aspenite/aspenite.c
> b/board/Marvell/aspenite/aspenite.c
> index 046ffd6..34ac7aa 100644
> --- a/board/Marvell/aspenite/aspenite.c
> +++ b/board/Marvell/aspenite/aspenite.c
> @@ -33,9 +33,14 @@ DECLARE_GLOBAL_DATA_PTR;
>  int board_early_init_f(void)
>  {
>  	u32 mfp_cfg[] = {
> +		/* I2C */
> +		MFP105_CI2C_SDA,
> +		MFP106_CI2C_SCL,
> +
>  		/* Enable Console on UART1 */
>  		MFP107_UART1_RXD,
>  		MFP108_UART1_TXD,
> +
>  		MFP_EOC		/*End of configureation*/
>  	};
>  	/* configure MFP's */
> diff --git a/include/configs/aspenite.h b/include/configs/aspenite.h
> index fd35f3e..a6fa45e 100644
> --- a/include/configs/aspenite.h
> +++ b/include/configs/aspenite.h
> @@ -63,6 +63,18 @@
>  #undef CONFIG_ARCH_MISC_INIT
> 
>  /*
> + * I2C definition
> + */
> +#define CONFIG_CMD_I2C		1
> +#define CONFIG_I2C_MV		1
> +#define CONFIG_PXA_I2C_NUM	2
> +#define CONFIG_I2C_MULTI_BUS	1
> +#define CONFIG_PXA_I2C_REG	{0xd4011000, 0xd4025000}
> +#define CONFIG_HARD_I2C		1
> +#define CONFIG_SYS_I2C_SPEED	0
> +#define CONFIG_SYS_I2C_SLAVE	0xfe

Same use ifdef CONFIG_CMD_I2C

Regards..
Prafulla . .

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