[U-Boot] [RFC] Review of U-Boot timer API

[Wolfgang Denk]

Dear "J. William Campbell",

In message <4DD8B3ED.4000408 at comcast.net> you wrote:
>
...
>        This statement, as written, is false. While it is true that the 
> power PC (and others) have a 64 bit counter that runs at a many 
> megahertz rate, it is NOT true that all 64 bits must be used to obtain a 
> millisecond timer. A millisecond timer can be produced by using the 33 
> bits of the 64 bit counter whose lsb is <= 1 ms and > 0.5 ms. This value 
> can be extracted by a right shift and masking of the 64 bit counter. Two 
> 32 bit multiplies and adds will produce a correct monotonic 1 ms timer. 
> This is certainly the best way to go on systems that do not have a 
> hardware 64 bit by 32 bit divide. See the thread "ARM timing code 
> refactoring" for an example of how this can be done. This timer will 
> NEVER result in a wrong value, although it does loose  1 ms every 1193 
> hours.

I think we should NOT bother about low level optimization details
wether or not we have a 64 bit divide instruction of if we need to
emulate it in software.  Let's keep such early optimizations out of
this phase and deal with the specific implementation later, once we
agreed on a design.

Best regards,

Wolfgang Denk

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