[U-Boot] [PATCH] ARM: i.MX51: Config option to disable PLL1

[David Jander]

On Thu, 26 May 2011 19:00:14 +0200
David Jander <david at protonic.nl> wrote:

> i.MX51 PLL1 seems to have stability problems. It is advised to not use it,
> although it is unclear whether all boards and/or chip revisions have this
> problem. Using PLL2 for the core and DDR2 seems to fix the problem.
> No official errata yet.

Forgot to mention this in the commit message:

All boards that need this fix (all of them?) should change their board config
header file to include this:

#define CONFIG_MX51_AVOID_PLL1

...

#ifdef CONFIG_MX51_AVOID_PLL1
#define CONFIG_SYS_CLKTL_CBCDR  0x59EC7580
#else
#define CONFIG_SYS_CLKTL_CBCDR	0x59E35100
#endif

This is the case for mx51evk.h, and the exact value of CONFIG_SYS_CLKTL_CBCDR
may vary depending on crystal frequency, type of RAM, NFC clocks, etc...

I would like to have some feedback before resubmitting the patch with the
amended commit message. I would also like to know whether I should include
another patch fixing all affected board-config headers? I guess this should be
decided by the respective maintainers, since this requires fixing the linux
kernel clock driver also...

Beste regards,

-- 
David Jander
Protonic Holland.