[U-Boot] [PATCH 3/3] powerpc/85xx: wait for alignment before resetting SERDES RX lanes (SERDES9)

[Wolfgang Denk]

Dear Timur Tabi,

In message <1317841251-27295-3-git-send-email-timur at freescale.com> you wrote:
> The work-around for P4080 erratum SERDES9 says that the SERDES receiver lanes
> should be reset after the XAUI starts tranmitting alignment signals.
> 
> Signed-off-by: Timur Tabi <timur at freescale.com>
> ---
>  arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c |   10 ------
>  board/freescale/corenet_ds/eth_p4080.c        |   40 ++++++++++++++++++++----
>  2 files changed, 33 insertions(+), 17 deletions(-)

Checkpatch says:

WARNING: externs should be avoided in .c files
#114: FILE: board/freescale/corenet_ds/eth_p4080.c:100:
+       extern struct phy_driver tn2020_driver;


Please clean up and resubmit.  Thanks.

Best regards,

Wolfgang Denk

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