[U-Boot] [PATCH 4/6] davinci_emac: fix for running with dcache enabled

[Wolfgang Denk]

Dear Anton Staaf,

In message <CAF6FioWbLz9JKBnj5sJGALtj=bJyLNbFvunNa6FE62y42t6-hw at mail.gmail.com> you wrote:
>
> > When PPC was building again, I tested it on ARM (which I assumed was
> > OK, given that this was Anton's primary architecture). =A0That was when
> > I finally gave up, see
> 
> Yes, the patches expose the fact that almost no boards define
> CONFIG_SYS_CACHELINE_SIZE.

Um... 

-> ls include/configs/* | wc -l
577
-> grep CONFIG_SYS_CACHELINE_SIZE include/configs/* | wc -l
199

So that's more than one third of all boards - most of them PPC...

> I am working on a "solution" for this.  My first thought is to add defines
> for
> CONFIG_SYS_CACHELINE_SIZE in all of the arch cache.h files that
> currently do not have them.
> This would be all cache.h files other than the PPC one.  But this
> could be a huge amount of work
> to look up all of the arch cacheline sizes.  So I am thinking of
> putting in a wrong, but large power
> of two so that boards will build and probably work.  But will
> certainly need to be fixed up...

Please don't - bogus stuff that appears to be working is known to
never get fixed.  Let's rather break the boards - this enforces the
needed clean-up.

> Another solution would be to do the above and define
> CONFIG_SYS_CACHELINE_SIZE as a
> large (128?) value and then indicate that that config is to deprecated
> in favor of Mikes suggestion
> of using the Linux CACHE BITS defines.  Then we can move boards over
> to that mechanism
> over time, and in the mean time all boards will compile, and
> architectures/boards that correctly
> define their cacheline size will function correctly, and
> architectures/boards that use the large default
> will most likely function correctly...

At least a big, dfat build warning must be issued, then (but only one,
not a loooooong list).

Best regards,

Wolfgang Denk

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