[U-Boot] [PATCH v2 11/11] cache: include asm/cache.h for ARCH_DMA_MINALIGN definition

[Anton Staaf]

ARCH_DMA_MINALIGN will be used to allocate DMA buffers that are
aligned correctly.  In all current cases this means that the DMA
buffer will be aligned to at least the L1 data cache line size of
the configured architecture.  If the board configuration file
does not specify the architecture L1 data cache line size then the
maximum line size of the architecture is used to align DMA buffers.

Signed-off-by: Anton Staaf <robotboy at chromium.org>
Cc: Mike Frysinger <vapier at gentoo.org>
Cc: Lukasz Majewski <l.majewski at samsung.com>
Cc: Wolfgang Denk <wd at denx.de>
Cc: Stefano Babic <sbabic at denx.de>
Cc: Ilya Yanok <yanok at emcraft.com>
Cc: Laurence Withers <lwithers at guralp.com>
---
 include/common.h |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/include/common.h b/include/common.h
index a55600b..3a6ef0e 100644
--- a/include/common.h
+++ b/include/common.h
@@ -813,6 +813,14 @@ int cpu_release(int nr, int argc, char * const argv[]);
 #define ALIGN(x,a)		__ALIGN_MASK((x),(typeof(x))(a)-1)
 #define __ALIGN_MASK(x,mask)	(((x)+(mask))&~(mask))
 
+/*
+ * ARCH_DMA_MINALIGN is defined in asm/cache.h for each architecture.  It
+ * is used to align DMA buffers.
+ */
+#ifndef __ASSEMBLY__
+#include <asm/cache.h>
+#endif
+
 /* Pull in stuff for the build system */
 #ifdef DO_DEPS_ONLY
 # include <environment.h>
-- 
1.7.3.1