On Aug 24, 2011, at 11:40 AM, York Sun wrote: > Extend CAS write Latency (CWL) table to comply with DDR3 spec > > Signed-off-by: York Sun <yorksun at freescale.com> > --- > arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c | 18 ++++++++++++++++-- > 1 files changed, 16 insertions(+), 2 deletions(-) applied to 85xx - k