[U-Boot] Bottleneck of NAND copy speed

Scott Wood scottwood at freescale.com
Tue Sep 13 21:53:30 CEST 2011


On 09/12/2011 06:21 AM, Simon Schwarz wrote:
> Hi List,
> 
> ATM I'm working on a DMA transfer from NAND to RAM of the Linux-image in
> my SPL.
> 
> I’m searching for the speed bottleneck of the MT29F1G16ABBHC-ET 
> NAND-Flash on the devkit8000 (OMAP3).
> 
>  From the timings I set on the GPMC I calced a max. speed of around 26 
> MiB/s. In my measurements I have a speed of around 10 MiB/s.
> 
> Here is the image of my the calculation:
> https://docs.google.com/leaf?id=0B_wpO5K0MQSlYTcxMWVlOGEtY2FmYy00ODMyLWE1MTUtN2ZiZGViOWVhMzYw&hl=en_US
> 
> tcmd: The time for the initial read command
> twr: time to write the address
> tDn: Time for a 16bit read of Data
> 
> Does anyone has an idea where the bottleneck could be? Is my calculation 
> wrong?
> (ecc is done parallel to the DMA transfer).

Have you measured how much time is taken in software between each
operation -- time when the NAND chip is idle and software is either
processing the results of the last transaction or preparing for the next
one?

-Scott



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