[U-Boot] [PATCH 3/5] davinci: add clocks command

[nagabhushana.netagunte at ti.com]

From: Nagabhushana Netagunte <nagabhushana.netagunte at ti.com>

add 'clocks' command to print various clock frequency info found
in SOC such as ARM core frequency, DSP core frequency and DDR
frequency.

Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte at ti.com>
---
 arch/arm/cpu/arm926ejs/davinci/speed.c |   26 ++++++++++++++++++--------
 1 files changed, 18 insertions(+), 8 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/davinci/speed.c b/arch/arm/cpu/arm926ejs/davinci/speed.c
index 7d2a6bd..ebcd212 100644
--- a/arch/arm/cpu/arm926ejs/davinci/speed.c
+++ b/arch/arm/cpu/arm926ejs/davinci/speed.c
@@ -20,9 +20,11 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  * MA 02111-1307 USA
  */
-
+#include <common.h>
+#include <netdev.h>
 #include <asm/arch/hardware.h>
 #include <asm/io.h>
+#include <command.h>
 
 /* offsets from PLL controller base */
 #define PLLC_PLLCTL	0x100
@@ -166,7 +168,15 @@ static unsigned pll_sysclk_mhz(unsigned pll_addr, unsigned div)
 	return DIV_ROUND_UP(base, 1000 * pll_div(pllbase, div));
 }
 
-int print_cpuinfo(void)
+#ifdef DAVINCI_DM6467EVM
+unsigned int davinci_arm_clk_get()
+{
+	return pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, ARM_PLLDIV) * 1000000;
+}
+#endif
+
+int showclocks(cmd_tbl_t *cmdtp,
+	int flag, int argc, char * const argv[])
 {
 	/* REVISIT fetch and display CPU ID and revision information
 	 * too ... that will matter as more revisions appear.
@@ -184,11 +194,11 @@ int print_cpuinfo(void)
 			pll_sysclk_mhz(DAVINCI_PLL_CNTRL1_BASE, DDR_PLLDIV)
 				/ 2);
 	return 0;
-}
 
-#ifdef DAVINCI_DM6467EVM
-unsigned int davinci_arm_clk_get()
-{
-	return pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, ARM_PLLDIV) * 1000000;
 }
-#endif
+
+U_BOOT_CMD(
+	clocks,	1, 0, showclocks,
+	"display clocks",
+	""
+);
-- 
1.6.2.4