[U-Boot] [PATCH] Efika: Configure additional regulators for HDMI output

[Marek Vasut]

Signed-off-by: Marek Vasut <marek.vasut at gmail.com>
Cc: Stefano Babic <sbabic at denx.de>
---
 board/efikamx/efikamx.c |   16 +++++++++++-----
 1 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c
index 29fff72..276753c 100644
--- a/board/efikamx/efikamx.c
+++ b/board/efikamx/efikamx.c
@@ -222,7 +222,7 @@ static void power_init(void)
 
 	/* Set core voltage to 1.1V */
 	val = pmic_reg_read(REG_SW_0);
-	val = (val & ~SWx_VOLT_MASK) | SWx_1_100V;
+	val = (val & ~SWx_VOLT_MASK) | SWx_1_200V;
 	pmic_reg_write(REG_SW_0, val);
 
 	/* Setup VCC (SW2) to 1.25 */
@@ -256,18 +256,24 @@ static void power_init(void)
 		(SWMODE_AUTO_AUTO << SWMODE4_SHIFT);
 	pmic_reg_write(REG_SW_5, val);
 
-	/* Set VDIG to 1.65V, VGEN3 to 1.8V, VCAM to 2.6V */
+	/* Set VDIG to 1.8V, VGEN3 to 1.8V, VCAM to 2.6V */
 	val = pmic_reg_read(REG_SETTING_0);
 	val &= ~(VCAM_MASK | VGEN3_MASK | VDIG_MASK);
-	val |= VDIG_1_65 | VGEN3_1_8 | VCAM_2_6;
+	val |= VDIG_1_8 | VGEN3_1_8 | VCAM_2_6;
 	pmic_reg_write(REG_SETTING_0, val);
 
+
 	/* Set VVIDEO to 2.775V, VAUDIO to 3V, VSD to 3.15V */
 	val = pmic_reg_read(REG_SETTING_1);
 	val &= ~(VVIDEO_MASK | VSD_MASK | VAUDIO_MASK);
-	val |= VSD_3_15 | VAUDIO_3_0 | VVIDEO_2_775;
+	val |= VSD_3_15 | VAUDIO_3_0 | VVIDEO_2_775 | VGEN1_1_2 | VGEN2_3_15;
 	pmic_reg_write(REG_SETTING_1, val);
 
+	/* Enable VGEN1, VGEN2, VDIG, VPLL */
+	val = pmic_reg_read(REG_MODE_0);
+	val |= VGEN1EN | VDIGEN | VGEN2EN | VPLLEN;
+	pmic_reg_write(REG_MODE_0, val);
+
 	/* Configure VGEN3 and VCAM regulators to use external PNP */
 	val = VGEN3CONFIG | VCAMCONFIG;
 	pmic_reg_write(REG_MODE_1, val);
@@ -275,7 +281,7 @@ static void power_init(void)
 
 	/* Enable VGEN3, VCAM, VAUDIO, VVIDEO, VSD regulators */
 	val = VGEN3EN | VGEN3CONFIG | VCAMEN | VCAMCONFIG |
-		VVIDEOEN | VAUDIOEN  | VSDEN;
+		VVIDEOEN | VAUDIOEN | VSDEN;
 	pmic_reg_write(REG_MODE_1, val);
 
 	val = pmic_reg_read(REG_POWER_CTL2);
-- 
1.7.5.4