[U-Boot] [PATCH] x86: turn off cache: set control register properly

[Ondra Kupka]

Dear Marek,

I am not really sure it would bring any advantage since it is used only on 2
places as far as I know and the meaning of those few lines of code is very
clear and commented...

Regards,
Ondra K.

On Fri, Sep 30, 2011 at 10:24 PM, Marek Vasut <marek.vasut at gmail.com> wrote:

> On Friday, September 30, 2011 08:27:07 PM Ondrej Kupka wrote:
> > Bits should be ORed when they are supposed to be added together
> >
> > Cc: Graeme Russ <graeme.russ at gmail.com>
> > Signed-off-by: Ondrej Kupka <ondra.cap at gmail.com>
> > ---
> >  arch/x86/cpu/start16.S |    2 +-
> >  1 files changed, 1 insertions(+), 1 deletions(-)
> >
> > diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S
> > index 3d3017a..9dabff2 100644
> > --- a/arch/x86/cpu/start16.S
> > +++ b/arch/x86/cpu/start16.S
> > @@ -50,7 +50,7 @@ board_init16_ret:
> >
> >       /* Turn of cache (this might require a 486-class CPU) */
> >       movl    %cr0, %eax
> > -     orl     $(X86_CR0_NW & X86_CR0_CD), %eax
> > +     orl     $(X86_CR0_NW | X86_CR0_CD), %eax
> >       movl    %eax, %cr0
> >       wbinvd
>
> Dear Ondrej Kupka,
>
> Can we make this into some macro so we'd avoid such errors in the future ?
>
> Cheers
>