[U-Boot] [PATCH 1/2] ARM926EJS: Make asm routines volatile in cache ops

[Marek Vasut]

We certainly don't want the compiler to reorganise the code for dcache flushing.

Signed-off-by: Marek Vasut <marex at denx.de>
Cc: Stefano Babic <sbabic at denx.de>
Cc: Albert ARIBAUD <albert.u.boot at aribaud.net>
---
 arch/arm/cpu/arm926ejs/cache.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c
index 5b23e3a..0b36294 100644
--- a/arch/arm/cpu/arm926ejs/cache.c
+++ b/arch/arm/cpu/arm926ejs/cache.c
@@ -82,7 +82,7 @@ void flush_dcache_range(unsigned long start, unsigned long stop)
 		start += CONFIG_SYS_CACHELINE_SIZE;
 	}
 
-	asm("mcr p15, 0, %0, c7, c10, 4\n"::"r"(0));
+	asm volatile("mcr p15, 0, %0, c7, c10, 4\n"::"r"(0));
 }
 
 void flush_cache(unsigned long start, unsigned long size)
-- 
1.7.9.1