[U-Boot] [PATCH v3 18/23] tegra: Turn off power detect in board init

[Wei Ni]

>-----Original Message-----
>From: Simon Glass [mailto:sjg at chromium.org]
>Sent: Tuesday, April 03, 2012 7:19 AM
>To: U-Boot Mailing List
>Cc: Tom Warren; Stephen Warren; Wei Ni; Simon Glass; Stephen Warren
>Subject: [PATCH v3 18/23] tegra: Turn off power detect in board init
>
>From: Wei Ni <wni at nvidia.com>
>
>Tegra core power rail has leakage voltage around 0.2V while system in
>suspend mode. The source of the leakage should be coming from PMC power
>detect logic for IO rails power detection.
>That can be disabled by writing a '0' to PWR_DET_LATCH followed by writing '0'
>to PWR_DET (APBDEV_PMC_PWR_DET_0).

Signe-off-by: Wei Ni <wni at nvidia.com>

>
>Signed-off-by: Simon Glass <sjg at chromium.org>
>---
>Changes in v3:
>- Fix CONFIG_TEGRA_I2C define
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