[U-Boot] [PATCH 5/8] MXC FEC: Resolve speed before configuring gasket

[Stefano Babic]

On 12/04/2012 11:33, Timo Ketola wrote:
> Signed-off-by: Timo Ketola <timo at exertus.fi>
> ---

Hi Timo,

>  drivers/net/fec_mxc.c |   41 ++++++++++++++++++++++-------------------
>  1 files changed, 22 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
> index 1fdd071..5d11df2 100644
> --- a/drivers/net/fec_mxc.c
> +++ b/drivers/net/fec_mxc.c

Please consider to rebase your patch on u-boot-imx, next branch. There
are already a couple of patches related to gasket and MII.

> @@ -406,6 +406,22 @@ static int fec_open(struct eth_device *edev)
>  	 */
>  	writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_ETHER_EN,
>  		&fec->eth->ecntrl);
> +#ifdef CONFIG_PHYLIB
> +	if (!fec->phydev)
> +		fec_eth_phy_config(edev);
> +	if (fec->phydev) {
> +		/* Start up the PHY */
> +		phy_startup(fec->phydev);
> +		speed = fec->phydev->speed;
> +	} else {
> +		speed = _100BASET;
> +	}
> +#else
> +	miiphy_wait_aneg(edev);
> +	speed = miiphy_speed(edev->name, fec->phy_id);
> +	// FIXME: useless call: miiphy_duplex(edev->name, fec->phy_id);

This is dead code. // comments are not allowed, comment should be real
comments, not used to disable code. Why are you disabling ? Please
explain the reason and, if it is required, provide a separate patch for
this.

> +#endif
> +
>  #if defined(CONFIG_MX25) || defined(CONFIG_MX53)
>  	udelay(100);
>  	/*
> @@ -418,9 +434,12 @@ static int fec_open(struct eth_device *edev)
>  	/* wait for the gasket to be disabled */
>  	while (readw(&fec->eth->miigsk_enr) & MIIGSK_ENR_READY)
>  		udelay(2);
> -
> -	/* configure gasket for RMII, 50 MHz, no loopback, and no echo */
> -	writew(MIIGSK_CFGR_IF_MODE_RMII, &fec->eth->miigsk_cfgr);
> +	if (speed == _100BASET)
> +		/* configure gasket for RMII, 50 MHz, no loopback, and no echo */
> +		writew(MIIGSK_CFGR_IF_MODE_RMII, &fec->eth->miigsk_cfgr);
> +	else
> +		/* configure gasket for RMII, 5 MHz, no loopback, and no echo */
> +		writew(MIIGSK_CFGR_IF_MODE_RMII | MIIGSK_CFGR_FRCONT, &fec->eth->miigsk_cfgr);

Right, this is correct for 10Mhz Ethernet.

Best regards,
Stefano Babic

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