[U-Boot] [PATCH 5/8] MXC FEC: Resolve speed before configuring gasket

[Troy Kisky]

On 4/12/2012 2:33 AM, Timo Ketola wrote:
> Signed-off-by: Timo Ketola<timo at exertus.fi>
> ---
>   drivers/net/fec_mxc.c |   41 ++++++++++++++++++++++-------------------
>   1 files changed, 22 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
> index 1fdd071..5d11df2 100644
> --- a/drivers/net/fec_mxc.c
> +++ b/drivers/net/fec_mxc.c
> @@ -406,6 +406,22 @@ static int fec_open(struct eth_device *edev)
>   	 */
>   	writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_ETHER_EN,
>   		&fec->eth->ecntrl);
> +#ifdef CONFIG_PHYLIB
> +	if (!fec->phydev)
> +		fec_eth_phy_config(edev);
> +	if (fec->phydev) {
> +		/* Start up the PHY */
> +		phy_startup(fec->phydev);
> +		speed = fec->phydev->speed;
> +	} else {
> +		speed = _100BASET;
> +	}
> +#else
> +	miiphy_wait_aneg(edev);
> +	speed = miiphy_speed(edev->name, fec->phy_id);
> +	// FIXME: useless call: miiphy_duplex(edev->name, fec->phy_id);
> +#endif
> +
>   #if defined(CONFIG_MX25) || defined(CONFIG_MX53)
>   	udelay(100);
>   	/*
> @@ -418,9 +434,12 @@ static int fec_open(struct eth_device *edev)
>   	/* wait for the gasket to be disabled */
>   	while (readw(&fec->eth->miigsk_enr)&  MIIGSK_ENR_READY)
>   		udelay(2);
> -
> -	/* configure gasket for RMII, 50 MHz, no loopback, and no echo */
> -	writew(MIIGSK_CFGR_IF_MODE_RMII,&fec->eth->miigsk_cfgr);
> +	if (speed == _100BASET)
> +		/* configure gasket for RMII, 50 MHz, no loopback, and no echo */
> +		writew(MIIGSK_CFGR_IF_MODE_RMII,&fec->eth->miigsk_cfgr);
> +	else
> +		/* configure gasket for RMII, 5 MHz, no loopback, and no echo */
> +		writew(MIIGSK_CFGR_IF_MODE_RMII | MIIGSK_CFGR_FRCONT,&fec->eth->miigsk_cfgr);
>   
This will break gigabit speed.  How about

if (speed != _10BASET)



>   	/* re-enable the gasket */
>   	writew(MIIGSK_ENR_EN,&fec->eth->miigsk_enr);
> @@ -435,22 +454,6 @@ static int fec_open(struct eth_device *edev)
>   	}
>   #endif
>
> -#ifdef CONFIG_PHYLIB
> -	if (!fec->phydev)
> -		fec_eth_phy_config(edev);
> -	if (fec->phydev) {
> -		/* Start up the PHY */
> -		phy_startup(fec->phydev);
> -		speed = fec->phydev->speed;
> -	} else {
> -		speed = _100BASET;
> -	}
> -#else
> -	miiphy_wait_aneg(edev);
> -	speed = miiphy_speed(edev->name, fec->phy_id);
> -	miiphy_duplex(edev->name, fec->phy_id);
> -#endif
> -
>   #ifdef FEC_QUIRK_ENET_MAC
>   	{
>   		u32 ecr = readl(&fec->eth->ecntrl)&  ~FEC_ECNTRL_SPEED;