[U-Boot] [PATCH] openrisc/cache: disable icache during invalidation

[Stefan Kristiansson]

invalidating the memory area that is being executed
while icache is on is a bit adventurous,
make sure it's turned off during this operation

Signed-off-by: Stefan Kristiansson <stefan.kristiansson at saunalahti.fi>
---
 arch/openrisc/cpu/cache.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/arch/openrisc/cpu/cache.c b/arch/openrisc/cpu/cache.c
index 2a73a4f..fedfd89 100644
--- a/arch/openrisc/cpu/cache.c
+++ b/arch/openrisc/cpu/cache.c
@@ -44,11 +44,15 @@ void invalidate_dcache_range(unsigned long addr, unsigned long stop)
 static void invalidate_icache_range(unsigned long addr, unsigned long stop)
 {
 	ulong block_size = (mfspr(SPR_ICCFGR) & SPR_ICCFGR_CBS) ? 32 : 16;
+	ulong ie = icache_status();
 
+	icache_disable();
 	while (addr < stop) {
 		mtspr(SPR_ICBIR, addr);
 		addr += block_size;
 	}
+	if (ie)
+		icache_enable();
 }
 
 void flush_cache(unsigned long addr, unsigned long size)
-- 
1.7.5.4