[U-Boot] [PATCH 2/4][v2] powerpc/85xx:Fix MSR[DE] bit in MSR to support debugger

[Prabhakar Kushwaha]

Debugging of e500 and e500v1 processer requires MSR[DE] bit to be set always.
Where MSR = Machine State register

Make sure of MSR[DE] bit is set uniformaly across the different execution
address space i.e. AS0 and AS1.

Signed-off-by: Radu Lazarescu <radu.lazarescu at freescale.com>
Signed-off-by: Catalin Udma <catalin.udma at freescale.com>
Signed-off-by: Marius Grigoras <marius.grigoras at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
---
  Based upon git://git.denx.de/u-boot.git branch master

 Changes for v2: 
	- Avoid MSR_DE negation in arch_preboot
	- Made MSR_DE set code independent of any #define

No change, Resending again

 Tested on
  - SoC having E500 Family processor (P1010RDB, BSC9131RDB)
  - SoC having E500MC Family processor (P4080DS, P3041DS)

 arch/powerpc/cpu/mpc85xx/cpu_init.c |    2 +-
 arch/powerpc/cpu/mpc85xx/start.S    |    7 +++++--
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 2e4a06c..3bcbffa 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -532,7 +532,7 @@ void arch_preboot_os(void)
 	 * disabled by the time we get called.
 	 */
 	msr = mfmsr();
-	msr &= ~(MSR_ME|MSR_CE|MSR_DE);
+	msr &= ~(MSR_ME|MSR_CE);
 	mtmsr(msr);
 
 	setup_ivors();
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 7bfa2d5..597151b 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -82,6 +82,9 @@
 	.globl _start_e500
 
 _start_e500:
+/* Enable debug exception */
+	li	r1,MSR_DE
+	mtmsr 	r1
 
 #if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_E500MC)
 	/* ISBC uses L2 as stack.
@@ -729,8 +732,8 @@ create_init_ram_area:
 	msync
 	tlbwe
 
-	lis	r6,MSR_IS|MSR_DS at h
-	ori	r6,r6,MSR_IS|MSR_DS at l
+	lis	r6,MSR_IS|MSR_DS|MSR_DE at h
+	ori	r6,r6,MSR_IS|MSR_DS|MSR_DE at l
 	lis	r7,switch_as at h
 	ori	r7,r7,switch_as at l
 
-- 
1.7.5.4