[U-Boot] [PATCH v3 1/2] gpio: bcm2835: Add GPIO driver
Vikram Narayanan
vikram186 at gmail.com
Wed Aug 1 04:31:14 CEST 2012
On 7/31/2012 11:18 PM, Vikram Narayanan wrote:
> Driver for BCM2835 SoC. This gives the basic functionality of
> setting/clearing the output.
>
> Signed-off-by: Vikram Narayanan<vikram186 at gmail.com>
> ---
> arch/arm/include/asm/arch-bcm2835/gpio.h | 71 ++++++++++++++++++++++++
> drivers/gpio/Makefile | 1 +
> drivers/gpio/bcm2835_gpio.c | 88 ++++++++++++++++++++++++++++++
> 3 files changed, 160 insertions(+), 0 deletions(-)
> create mode 100644 arch/arm/include/asm/arch-bcm2835/gpio.h
> create mode 100644 drivers/gpio/bcm2835_gpio.c
>
> diff --git a/arch/arm/include/asm/arch-bcm2835/gpio.h b/arch/arm/include/asm/arch-bcm2835/gpio.h
> new file mode 100644
> index 0000000..515456a
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-bcm2835/gpio.h
> @@ -0,0 +1,71 @@
> +/*
> + * Copyright (C) 2012 Vikram Narayananan
> + *<vikram186 at gmail.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef _BCM2835_GPIO_H_
> +#define _BCM2835_GPIO_H_
> +
> +#define BCM2835_GPIO_BASE 0x7E200000
> +#define BCM2835_GPIO_COUNT 53
GPIO count should be 54 to make the gpio_is_valid work correctly when
the gpio is 53.
Will fix in v4.
Any other comments?
> +
> +#define BCM2835_GPIO_FSEL_MASK 0x7
> +#define BCM2835_GPIO_INPUT 0x0
> +#define BCM2835_GPIO_OUTPUT 0x1
> +#define BCM2835_GPIO_ALT0 0x2
> +#define BCM2835_GPIO_ALT1 0x3
> +#define BCM2835_GPIO_ALT2 0x4
> +#define BCM2835_GPIO_ALT3 0x5
> +#define BCM2835_GPIO_ALT4 0x6
> +#define BCM2835_GPIO_ALT5 0x7
> +
> +#define BCM2835_GPIO_COMMON_BANK(gpio) ((gpio< 32) ? 0 : 1)
> +#define BCM2835_GPIO_COMMON_SHIFT(gpio) (gpio& 0x1f)
> +
> +#define BCM2835_GPIO_FSEL_BANK(gpio) (gpio / 10)
> +#define BCM2835_GPIO_FSEL_SHIFT(gpio) ((gpio % 10) * 3)
> +
> +struct bcm_gpio_regs {
> + u32 gpfsel[6];
> + u32 reserved1;
> + u32 gpset[2];
> + u32 reserved2;
> + u32 gpclr[2];
> + u32 reserved3;
> + u32 gplev[2];
> + u32 reserved4;
> + u32 gpeds[2];
> + u32 reserved5;
> + u32 gpren[2];
> + u32 reserved6;
> + u32 gpfen[2];
> + u32 reserved7;
> + u32 gphen[2];
> + u32 reserved8;
> + u32 gplen[2];
> + u32 reserved9;
> + u32 gparen[2];
> + u32 reserved10;
> + u32 gppud;
> + u32 gppudclk[2];
> +};
> +
> +#endif /* _BCM2835_GPIO_H_ */
> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
> index 32a2474..8d2f2b2 100644
> --- a/drivers/gpio/Makefile
> +++ b/drivers/gpio/Makefile
> @@ -40,6 +40,7 @@ COBJS-$(CONFIG_TEGRA_GPIO) += tegra_gpio.o
> COBJS-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o
> COBJS-$(CONFIG_ALTERA_PIO) += altera_pio.o
> COBJS-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o
> +COBJS-$(CONFIG_BCM2835_GPIO) += bcm2835_gpio.o
>
> COBJS := $(COBJS-y)
> SRCS := $(COBJS:.o=.c)
> diff --git a/drivers/gpio/bcm2835_gpio.c b/drivers/gpio/bcm2835_gpio.c
> new file mode 100644
> index 0000000..eb02efa
> --- /dev/null
> +++ b/drivers/gpio/bcm2835_gpio.c
> @@ -0,0 +1,88 @@
> +/*
> + * Copyright (C) 2012 Vikram Narayananan
> + *<vikram186 at gmail.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include<common.h>
> +#include<asm/gpio.h>
> +#include<asm/io.h>
> +
> +inline int gpio_is_valid(unsigned gpio)
> +{
> + return (gpio< BCM2835_GPIO_COUNT);
> +}
> +
> +int gpio_request(unsigned gpio, const char *label)
> +{
> + return gpio_is_valid(gpio);
> +}
> +
> +int gpio_free(unsigned gpio)
> +{
> + return 0;
> +}
> +
> +int gpio_direction_input(unsigned gpio)
> +{
> + struct bcm_gpio_regs *reg = (struct bcm_gpio_regs *)BCM2835_GPIO_BASE;
> + unsigned val;
> +
> + val = readl(®->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
> + val&= ~(BCM2835_GPIO_FSEL_MASK<< BCM2835_GPIO_FSEL_SHIFT(gpio));
> + val |= (BCM2835_GPIO_INPUT<< BCM2835_GPIO_FSEL_SHIFT(gpio));
> + writel(val, reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
> + }
> +
> +int gpio_direction_output(unsigned gpio, int value)
> +{
> + struct bcm_gpio_regs *reg = (struct bcm_gpio_regs *)BCM2835_GPIO_BASE;
> + unsigned val;
> +
> + if (value)
> + gpio_set_value(gpio, value);
> +
> + val = readl(®->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
> + val&= ~(BCM2835_GPIO_FSEL_MASK<< BCM2835_GPIO_FSEL_SHIFT(gpio));
> + val |= (BCM2835_GPIO_OUTPUT<< BCM2835_GPIO_FSEL_SHIFT(gpio));
> + writel(val, reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
> +}
> +
> +int gpio_get_value(unsigned gpio)
> +{
> + struct bcm_gpio_regs *reg = (struct bcm_gpio_regs *)BCM2835_GPIO_BASE;
> + unsigned val;
> +
> + val = readl(®->gplev[BCM2835_GPIO_COMMON_BANK(gpio)]);
> +
> + return (val>> BCM2835_GPIO_COMMON_SHIFT(gpio))& 0x1;
> +}
> +
> +int gpio_set_value(unsigned gpio, int value)
> +{
> + struct bcm_gpio_regs *reg = (struct bcm_gpio_regs *)BCM2835_GPIO_BASE;
> + u32 *output_reg = value ? reg->gpset : reg->gpclr;
> +
> + writel(1<< BCM2835_GPIO_COMMON_SHIFT(gpio),
> + output_reg[BCM2835_GPIO_COMMON_BANK(gpio)]);
> +
> + return 0;
> +}
> +
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