[U-Boot] [PATCH 13/16] Blackfin: Bf60x: add hw watchdog support

[Mike Frysinger]

On Tuesday 07 August 2012 04:07:52 Bob Liu wrote:
> --- a/arch/blackfin/cpu/initcode.c
> +++ b/arch/blackfin/cpu/initcode.c
>
>  	if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS) {
>  		serial_putc('e');
> +#ifdef __ADSPBF60x__
> +		int i;
> +		bfin_write_SEC_GCTL(0x2);
> +		while (i++ < 100000);
> +		bfin_write_SEC_FCTL(0xc1);
> +		bfin_write_SEC_SCTL(2, bfin_read_SEC_SCTL(2) | 0x6);
> +
> +		bfin_write_SEC_CCTL(0x2);
> +		while (i++ < 100000);
> +		bfin_write_SEC_GCTL(0x1);
> +		bfin_write_SEC_CCTL(0x1);
> +#endif

err, this doesn't look like hardware watchdog ... this is the interrupt 
controller isn't it ?

those while() loops also won't fly -- you need to use a proper sync function 
here.  certainly not without comments as to what's going on.

> --- a/arch/blackfin/cpu/start.S
> +++ b/arch/blackfin/cpu/start.S
> @@ -65,6 +65,7 @@ ENTRY(_start)
>  	p5.h = HI(COREMMR_BASE);
> 
>  #ifdef CONFIG_HW_WATCHDOG
> +#ifndef __ADSPBF60x__
>  # ifndef CONFIG_HW_WATCHDOG_TIMEOUT_START
>  #  define CONFIG_HW_WATCHDOG_TIMEOUT_START 5000
>  # endif
> @@ -78,6 +79,7 @@ ENTRY(_start)
>  	/* fire up the watchdog - R0.L above needs to be 0x0000 */
>  	W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r0;
>  #endif
> +#endif

you need to implement the bf60x equivalent here and not just disable the bf5xx 
code
-mike
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