[U-Boot] [PATCH 3/6 v2] powerpc/corenet_ds: Get rid of the CONFIG_SRIOBOOT_SLAVE_PORTx macro

[Liu Gang]

When compile the slave image for boot from SRIO, no longer need to
specify which SRIO port it will boot from. The code will get this
information from RCW and then finishes corresponding configurations.

This has the following advantages:
	1. No longer need to rebuild an image when change the SRIO port for
	   boot from SRIO, just rewrite the new RCW with selected port,
	   then the code will get the port information by reading new RCW.
	2. It will be easier to support other boot location options, for
	   example, boot from PCIE.

Signed-off-by: Liu Gang <Gang.Liu at freescale.com>
---
Changes in v2:
 - Rebase.
 - Add the support for p2041rdb platform

 arch/powerpc/include/asm/immap_85xx.h  |    1 +
 board/freescale/common/p_corenet/law.c |   13 -------------
 drivers/misc/fsl_law.c                 |   27 +++++++++++++++++++++++++++
 include/configs/P2041RDB.h             |    3 ---
 include/configs/corenet_ds.h           |    3 ---
 5 files changed, 28 insertions(+), 19 deletions(-)

diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 53d563e..91228e7 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1758,6 +1758,7 @@ typedef struct ccsr_gur {
 #define FSL_CORENET_RCWSR5_DDR_SYNC		0x00000080
 #define FSL_CORENET_RCWSR5_DDR_SYNC_SHIFT		 7
 #define FSL_CORENET_RCWSR5_SRDS_EN		0x00002000
+#define FSL_CORENET_RCWSR6_BOOT_LOC	0x0f800000
 #define FSL_CORENET_RCWSRn_SRDS_LPD_B2		0x3c000000 /* bits 162..165 */
 #define FSL_CORENET_RCWSRn_SRDS_LPD_B3		0x003c0000 /* bits 170..173 */
 #define FSL_CORENET_RCWSR7_MCK_TO_PLAT_RAT	0x00400000
diff --git a/board/freescale/common/p_corenet/law.c b/board/freescale/common/p_corenet/law.c
index c4566dd..09ef561 100644
--- a/board/freescale/common/p_corenet/law.c
+++ b/board/freescale/common/p_corenet/law.c
@@ -48,19 +48,6 @@ struct law_entry law_table[] = {
 #ifdef CONFIG_SYS_NAND_BASE_PHYS
 	SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
 #endif
-#ifdef CONFIG_SRIOBOOT_SLAVE
-#if defined(CONFIG_SRIOBOOT_SLAVE_PORT0)
-	SET_LAW(CONFIG_SYS_SRIOBOOT_SLAVE_ADDR_PHYS,
-				LAW_SIZE_1M, LAW_TRGT_IF_RIO_1),
-	SET_LAW(CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR_PHYS,
-				LAW_SIZE_1M, LAW_TRGT_IF_RIO_1),
-#elif defined(CONFIG_SRIOBOOT_SLAVE_PORT1)
-	SET_LAW(CONFIG_SYS_SRIOBOOT_SLAVE_ADDR_PHYS,
-				LAW_SIZE_1M, LAW_TRGT_IF_RIO_2),
-	SET_LAW(CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR_PHYS,
-				LAW_SIZE_1M, LAW_TRGT_IF_RIO_2),
-#endif
-#endif
 };
 
 int num_law_entries = ARRAY_SIZE(law_table);
diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c
index a7d04b7..a71a0ce 100644
--- a/drivers/misc/fsl_law.c
+++ b/drivers/misc/fsl_law.c
@@ -275,5 +275,32 @@ void init_laws(void)
 				law_table[i].size, law_table[i].trgt_id);
 	}
 
+#ifdef CONFIG_SRIOBOOT_SLAVE
+	/* check RCW to get which port is used for boot */
+	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+	u32 bootloc = in_be32(&gur->rcwsr[6]);
+	/* in SRIO boot we need to set specail LAWs for SRIO interfaces */
+	switch ((bootloc & FSL_CORENET_RCWSR6_BOOT_LOC) >> 23) {
+	case 0x8: /* boot from SRIO1 */
+		set_next_law(CONFIG_SYS_SRIOBOOT_SLAVE_ADDR_PHYS,
+				LAW_SIZE_1M,
+				LAW_TRGT_IF_RIO_1);
+		set_next_law(CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR_PHYS,
+				LAW_SIZE_1M,
+				LAW_TRGT_IF_RIO_1);
+		break;
+	case 0x9: /* boot from SRIO2 */
+		set_next_law(CONFIG_SYS_SRIOBOOT_SLAVE_ADDR_PHYS,
+				LAW_SIZE_1M,
+				LAW_TRGT_IF_RIO_2);
+		set_next_law(CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR_PHYS,
+				LAW_SIZE_1M,
+				LAW_TRGT_IF_RIO_2);
+		break;
+	default:
+		break;
+	}
+#endif
+
 	return ;
 }
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index f67fbf7..abd9ae0 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -409,9 +409,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
  * SRIOBOOT - SLAVE
  */
 #ifdef CONFIG_SRIOBOOT_SLAVE
-/* slave port for srioboot */
-#define CONFIG_SRIOBOOT_SLAVE_PORT0
-/* #define CONFIG_SRIOBOOT_SLAVE_PORT1 */
 #define CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR 0xFFE00000
 #define CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR_PHYS \
 		(0x300000000ull | CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR)
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index ba2b0d6..6d4ce48 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -412,9 +412,6 @@
  * SRIOBOOT - SLAVE
  */
 #ifdef CONFIG_SRIOBOOT_SLAVE
-/* slave port for srioboot */
-#define CONFIG_SRIOBOOT_SLAVE_PORT0
-/* #define CONFIG_SRIOBOOT_SLAVE_PORT1 */
 #define CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR 0xFFE00000
 #define CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR_PHYS \
 		(0x300000000ull | CONFIG_SYS_SRIOBOOT_UCODE_ENV_ADDR)
-- 
1.7.1