[U-Boot] [PATCH 25/37] arm: rmobile: Add support TMU base timer function

[Nobuhiro Iwamatsu]

Some rmobile SoC has TMU base timer function. This supports TMU.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj at renesas.com>
---
 V2: Set COBJS one object per line, and sort the list.

 arch/arm/cpu/armv7/rmobile/Makefile           |    4 +-
 arch/arm/cpu/armv7/rmobile/timer_tmu.c        |  161 +++++++++++++++++++++++++
 arch/arm/include/asm/arch-rmobile/timer_tmu.h |   51 ++++++++
 3 files changed, 214 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/rmobile/timer_tmu.c
 create mode 100644 arch/arm/include/asm/arch-rmobile/timer_tmu.h

diff --git a/arch/arm/cpu/armv7/rmobile/Makefile b/arch/arm/cpu/armv7/rmobile/Makefile
index 6f26a73..a5a1ced 100644
--- a/arch/arm/cpu/armv7/rmobile/Makefile
+++ b/arch/arm/cpu/armv7/rmobile/Makefile
@@ -28,10 +28,10 @@ LIB	= $(obj)lib$(SOC).o
 SOBJS = lowlevel_init.o
 COBJS-y += board.o
 COBJS-y += cpu_info.o
-COBJS-y += timer.o
-
+COBJS-$(CONFIG_GLOBAL_TIMER) += timer.o
 COBJS-$(CONFIG_SH73A0) += cpu_info-sh73a0.o
 COBJS-$(CONFIG_SH73A0) += pfc-sh73a0.o
+COBJS-$(CONFIG_TMU_TIMER) += timer_tmu.o
 
 COBJS	:= $(COBJS-y)
 SRCS    := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/arch/arm/cpu/armv7/rmobile/timer_tmu.c b/arch/arm/cpu/armv7/rmobile/timer_tmu.c
new file mode 100644
index 0000000..78aee07
--- /dev/null
+++ b/arch/arm/cpu/armv7/rmobile/timer_tmu.c
@@ -0,0 +1,161 @@
+/*
+ * (C) Copyright 2012
+ * Renesas Solutions Corp.
+ *
+ * This code is based on arch/sh/lib/time.c:
+ *
+ * (C) Copyright 2009
+ * Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
+ *
+ * (C) Copyright 2007-2010
+ * Nobobuhiro Iwamatsu <iwamatsu at nigauri.org>
+ *
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <div64.h>
+#include <asm/io.h>
+#include <asm/arch/timer_tmu.h>
+
+static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE;
+
+static unsigned long last_tcnt;
+static unsigned long long overflow_ticks;
+static u16 bit;
+
+static inline unsigned long long tick_to_time(unsigned long long tick)
+{
+	ulong timer_freq;
+	timer_freq = get_tmu0_clk_rate() >> ((bit + 1) * 2);
+	tick *= CONFIG_SYS_HZ;
+	do_div(tick, timer_freq);
+
+	return tick;
+}
+
+static inline unsigned long long usec_to_tick(unsigned long long usec)
+{
+	ulong timer_freq;
+	timer_freq = get_tmu0_clk_rate() >> ((bit + 1) * 2);
+	usec *= timer_freq;
+	do_div(usec, 1000000);
+
+	return usec;
+}
+
+static void tmu_timer_start(unsigned int timer)
+{
+	if (timer > 2)
+		return;
+	writeb(readb(&tmu->tstr) | (1 << timer), &tmu->tstr);
+}
+
+static void tmu_timer_stop(unsigned int timer)
+{
+	if (timer > 2)
+		return;
+	writeb(readb(&tmu->tstr) & ~(1 << timer), &tmu->tstr);
+}
+
+int timer_init(void)
+{
+	/* Divide clock by CONFIG_SYS_TMU_CLK_DIV */
+	u16 bit = 0;
+
+	switch (CONFIG_SYS_TMU_CLK_DIV) {
+	case 1024:
+		bit = 4;
+		break;
+	case 256:
+		bit = 3;
+		break;
+	case 64:
+		bit = 2;
+		break;
+	case 16:
+		bit = 1;
+		break;
+	case 4:
+	default:
+		break;
+	}
+	writew(readw(&tmu->tcr0) | bit, &tmu->tcr0);
+
+	tmu_timer_stop(0);
+	tmu_timer_start(0);
+
+	last_tcnt = 0;
+	overflow_ticks = 0;
+
+	return 0;
+}
+
+unsigned long long get_ticks(void)
+{
+	unsigned long tcnt = 0 - readl(&tmu->tcnt0);
+	unsigned long ticks = tcnt;
+
+	if (last_tcnt > tcnt) { /* overflow */
+		overflow_ticks++;
+		ticks = (0xffffffff - last_tcnt) + tcnt;
+	}
+
+	last_tcnt = tcnt;
+
+	return (overflow_ticks << 32) | tcnt;
+}
+
+void __udelay(unsigned long usec)
+{
+	unsigned long long tmp;
+	ulong tmo;
+
+	tmo = usec_to_tick(usec);
+	tmp = get_ticks() + tmo;	/* get current timestamp */
+
+	while (get_ticks() < tmp)	/* loop till event */
+		 /*NOP*/;
+}
+
+unsigned long get_timer(unsigned long base)
+{
+	/* return msec */
+	return tick_to_time(get_ticks()) - base;
+}
+
+void set_timer(unsigned long t)
+{
+	writel((0 - t), &tmu->tcnt0);
+}
+
+void reset_timer(void)
+{
+	tmu_timer_stop(0);
+	set_timer(0);
+	tmu_timer_start(0);
+}
+
+unsigned long get_tbclk(void)
+{
+	return get_tmu0_clk_rate() >> ((bit + 1) * 2);
+}
diff --git a/arch/arm/include/asm/arch-rmobile/timer_tmu.h b/arch/arm/include/asm/arch-rmobile/timer_tmu.h
new file mode 100644
index 0000000..c2ff6e4
--- /dev/null
+++ b/arch/arm/include/asm/arch-rmobile/timer_tmu.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2012  Renesas Solutions Corp.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __TIMER_TMU_H
+#define __TIMER_TMU_H
+
+#include <asm/types.h>
+
+struct tmu_regs {
+	u32 reserved;
+	u8  tstr;
+	u8  reserved2[3];
+	u32 tcor0;
+	u32 tcnt0;
+	u16 tcr0;
+	u16 reserved3;
+	u32 tcor1;
+	u32 tcnt1;
+	u16 tcr1;
+	u16 reserved4;
+	u32 tcor2;
+	u32 tcnt2;
+	u16 tcr2;
+	u16 reserved5;
+};
+
+static inline unsigned long get_tmu0_clk_rate(void)
+{
+	return CONFIG_SYS_CLK_FREQ;
+}
+
+#endif	/* __TIMER_TMU_H */
-- 
1.7.10