[U-Boot] [PATCH] mx35: Fix typo on EDIO
Benoît Thébaudeau
benoit.thebaudeau at advansee.com
Tue Aug 14 15:28:24 CEST 2012
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau at advansee.com>
Cc: Stefano Babic <sbabic at denx.de>
---
.../arch/arm/include/asm/arch-mx35/crm_regs.h | 4 ++--
.../board/CarMediaLab/flea3/flea3.c | 2 +-
.../board/freescale/mx35pdk/mx35pdk.c | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx35/crm_regs.h u-boot-4d3c95f/arch/arm/include/asm/arch-mx35/crm_regs.h
index e903cf1..7a2d1bb 100644
--- u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx35/crm_regs.h
+++ u-boot-4d3c95f/arch/arm/include/asm/arch-mx35/crm_regs.h
@@ -158,8 +158,8 @@
#define MXC_CCM_CGR0_CSPI2_MASK (0x3 << 12)
#define MXC_CCM_CGR0_ECT_OFFSET 14
#define MXC_CCM_CGR0_ECT_MASK (0x3 << 14)
-#define MXC_CCM_CGR0_EDI0_OFFSET 16
-#define MXC_CCM_CGR0_EDI0_MASK (0x3 << 16)
+#define MXC_CCM_CGR0_EDIO_OFFSET 16
+#define MXC_CCM_CGR0_EDIO_MASK (0x3 << 16)
#define MXC_CCM_CGR0_EMI_OFFSET 18
#define MXC_CCM_CGR0_EMI_MASK (0x3 << 18)
#define MXC_CCM_CGR0_EPIT1_OFFSET 20
diff --git u-boot-4d3c95f.orig/board/CarMediaLab/flea3/flea3.c u-boot-4d3c95f/board/CarMediaLab/flea3/flea3.c
index 34ede87..6cef24c 100644
--- u-boot-4d3c95f.orig/board/CarMediaLab/flea3/flea3.c
+++ u-boot-4d3c95f/board/CarMediaLab/flea3/flea3.c
@@ -247,7 +247,7 @@ int board_early_init_f(void)
/* enable clocks */
writel(readl(&ccm->cgr0) |
MXC_CCM_CGR0_EMI_MASK |
- MXC_CCM_CGR0_EDI0_MASK |
+ MXC_CCM_CGR0_EDIO_MASK |
MXC_CCM_CGR0_EPIT1_MASK,
&ccm->cgr0);
diff --git u-boot-4d3c95f.orig/board/freescale/mx35pdk/mx35pdk.c u-boot-4d3c95f/board/freescale/mx35pdk/mx35pdk.c
index bc415b8..787c923 100644
--- u-boot-4d3c95f.orig/board/freescale/mx35pdk/mx35pdk.c
+++ u-boot-4d3c95f/board/freescale/mx35pdk/mx35pdk.c
@@ -168,7 +168,7 @@ int board_early_init_f(void)
/* enable clocks */
writel(readl(&ccm->cgr0) |
MXC_CCM_CGR0_EMI_MASK |
- MXC_CCM_CGR0_EDI0_MASK |
+ MXC_CCM_CGR0_EDIO_MASK |
MXC_CCM_CGR0_EPIT1_MASK,
&ccm->cgr0);
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