[PATCH] cache: wip: Test program to evaluate if L2 is working.

[Lukasz Majewski]

Signed-off-by: Lukasz Majewski <l.majewski at samsung.com>
---
 arch/arm/cpu/armv7/exynos/soc.c |   28 ++++++++++++++++++++++++++++
 arch/arm/lib/cache-pl310.c      |    2 --
 board/samsung/trats/trats.c     |    2 ++
 include/common.h                |    1 +
 include/configs/trats.h         |    3 +++
 5 files changed, 34 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/exynos/soc.c b/arch/arm/cpu/armv7/exynos/soc.c
index 9e8705f..9660daa 100644
--- a/arch/arm/cpu/armv7/exynos/soc.c
+++ b/arch/arm/cpu/armv7/exynos/soc.c
@@ -24,6 +24,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/pl310.h>
+#include <linux/compiler.h>
 
 void reset_cpu(ulong addr)
 {
@@ -41,6 +42,7 @@ void enable_caches(void)
 #ifndef CONFIG_SYS_L2CACHE_OFF
 void v7_outer_cache_enable(void)
 {
+	/* puts("-\n"); */
 	pl310_enable();
 }
 void v7_outer_cache_disable(void)
@@ -48,3 +50,29 @@ void v7_outer_cache_disable(void)
 	pl310_disable();
 }
 #endif
+
+#define TEST_BUF_SIZE (1024*256)
+void test_l2_cache()
+{
+	int i, j;
+	u32 *ptr = (u32 *) 0x52000000;
+	volatile u64 sigma = 0;
+
+	/* Setup the buffer */
+	for (i = 0; i < TEST_BUF_SIZE; i++) {
+		*(ptr + i) = i;
+	}
+
+	flush_dcache_range((u32) ptr,
+			   (u32) ptr + (TEST_BUF_SIZE * sizeof(u32)));
+
+	/* Here data at Cache is in sync with SDRAM */
+	for (j = 0; j < 5000; j++) {
+		for (i = 0, sigma = 0; i < TEST_BUF_SIZE; i++)
+			sigma += *(ptr + i);
+		if (!(j % 500))
+			puts(".");
+	}
+
+	printf("sig: 0x%llx\n", sigma);
+}
diff --git a/arch/arm/lib/cache-pl310.c b/arch/arm/lib/cache-pl310.c
index 76d60cf..885063b 100644
--- a/arch/arm/lib/cache-pl310.c
+++ b/arch/arm/lib/cache-pl310.c
@@ -120,8 +120,6 @@ void v7_outer_cache_inval_range(u32 start, u32 stop)
 void pl310_enable(void)
 {
 	writel(1, &pl310->pl310_ctrl);
-	printf("p310_ctrl: 0x%x p310_aux_ctrl: 0x%x\n",
-	       readl(&pl310->pl310_ctrl), readl(&pl310->pl310_aux_ctrl));
 }
 
 void pl310_disable(void)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index 4f9cb5a..0db22cb 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -72,6 +72,8 @@ int board_init(void)
 	pmic_init();
 #endif
 
+	test_l2_cache();
+
 	return 0;
 }
 
diff --git a/include/common.h b/include/common.h
index 39859d3..ab4f009 100644
--- a/include/common.h
+++ b/include/common.h
@@ -570,6 +570,7 @@ int	checkdcache   (void);
 void	upmconfig     (unsigned int, unsigned int *, unsigned int);
 ulong	get_tbclk     (void);
 void	reset_cpu     (ulong addr);
+void    test_l2_cache (void);
 #if defined (CONFIG_OF_LIBFDT) && defined (CONFIG_OF_BOARD_SETUP)
 void ft_cpu_setup(void *blob, bd_t *bd);
 #ifdef CONFIG_PCI
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 4b2b4d6..f2e5bd9 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -42,6 +42,9 @@
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 
+#define CONFIG_SYS_DCACHE_OFF
+#define CONFIG_SYS_L2CACHE_OFF
+
 #ifndef CONFIG_SYS_L2CACHE_OFF
 #define CONFIG_SYS_L2_PL310
 #define CONFIG_SYS_PL310_BASE	0x10502000
-- 
1.7.2.3


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