[U-Boot] [PATCH 3/6] SPL: Port SPL framework to powerpc

[Daniel Schwierzeck]

2012/8/24 Stefan Roese <stefan.roese at gmail.com>:
> On 08/24/2012 06:42 PM, Daniel Schwierzeck wrote:
>>>>> The u-boot image is merged with SPL
>>>>> image without any padding or
>>>>> fixed flash offsets to achieve a maximum reduction of flash footprint.
>>>>
>>>> Interesting. I'm still padding to the fixed offset. Let me look into
>>>> squeezing those two images together as well...
>>>
>>> Looks good. One question though: How do you make sure, that your SPL
>>> image length is 4-byte aligned?
>>
>> I have 4-byte alignments for each section and for each address symbol
>> in my linker script.
>> Actually all MIPS linker scripts do this.
>
> Yes. I have those section alignments in the linker script as well. The
> problem is the end of the last (physical end in flash) section. If I
> have here a string with length 7 for example, the SPL binary has a
> non-4-byte aligned length.
>
> Any ideas on this?

MIPS linker scripts have a symbol in front of the BSS section that is
named uboot_end_data.
I think most ARM linker scripts have it too but it is named __image_copy_end.
This symbol is 4-byte-aligned. If I want to know the length of SPL
image i can simply do

ulong len = (ulong) &__image_copy_end - CONFIG_SPL_TEXT_BASE

and len is 4-byte-aligned

-- 
Best regards,
Daniel