[U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5

Pavel Machek pavel at denx.de
Thu Aug 30 22:42:11 CEST 2012


Hi!

> >>> spl_ram_load_image... will I need to create some kind of #ifdef? Or
> >>> would #ifdef BOOT_DEVICE_RAM do the trick?
> >>
> >> Good point, yes, we should add CONFIG_SPL_RAM_DEVICE and document it in
> >> docs/README.SPL and the toplevel README.
> > 
> > Ok, something like this? Posting separately, maybe it makes sense to
> > merge to your PATCH v6...?
> 
> Sure, just include the actual spl_ram_load_image bits as well and I'll
> pick it up.

Here you go.

--

Add support for loading image from ram in SPL.

Signed-off-by: Pavel Machek <pavel at denx.de>

diff --git a/README b/README
index ddbeb1b..e782cce 100644
--- a/README
+++ b/README
@@ -2636,6 +2636,9 @@ FIT uImage format:
 		CONFIG_SPL_SPI_SUPPORT
 		Support for drivers/spi/libspi.o in SPL binary
 
+		CONFIG_SPL_RAM_DEVICE
+		Support for running image already present in ram, in SPL binary 
+
 		CONFIG_SPL_LIBGENERIC_SUPPORT
 		Support for lib/libgeneric.o in SPL binary
 
diff --git a/common/spl/spl.c b/common/spl/spl.c
index eaea1c8..fb96a75 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -115,6 +115,22 @@ static void __noreturn jump_to_image_no_args(void)
 	image_entry((u32 *)boot_params_ptr_addr);
 }
 
+#ifdef CONFIG_SPL_RAM_DEVICE
+static void spl_ram_load_image(void)
+{
+	const struct image_header *header;
+
+	/* get the header */
+	/* it will point to a address defined by handoff which
+	will tell where the image located inside the flash. For now,
+	it will temporary fixed to address pointed by U-Boot */
+	header = (struct image_header *)
+		(CONFIG_SYS_TEXT_BASE -	sizeof(struct image_header));
+
+	spl_parse_image_header(header);
+}
+#endif
+
 void board_init_r(gd_t *dummy1, ulong dummy2)
 {
 	u32 boot_device;
@@ -132,6 +148,11 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	boot_device = spl_boot_device();
 	debug("boot device - %d\n", boot_device);
 	switch (boot_device) {
+#ifdef CONFIG_SPL_RAM_DEVICE
+	case BOOT_DEVICE_RAM:
+		spl_ram_load_image();
+		break;
+#endif
 #ifdef CONFIG_SPL_MMC_SUPPORT
 	case BOOT_DEVICE_MMC1:
 	case BOOT_DEVICE_MMC2:
diff --git a/doc/README.SPL b/doc/README.SPL
index e4a5ac3..2acafba 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -66,6 +66,7 @@ CONFIG_SPL_DMA_SUPPORT (drivers/dma/libdma.o)
 CONFIG_SPL_POST_MEM_SUPPORT (post/drivers/memory.o)
 CONFIG_SPL_NAND_LOAD (drivers/mtd/nand/nand_spl_load.o)
 CONFIG_SPL_SPI_LOAD (drivers/mtd/spi/spi_spl_load.o)
+CONFIG_SPL_RAM_DEVICE (common/spl/spl.c)
 
 
 Normally CPU is assumed to be the same between the SPL and normal

-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html


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