[U-Boot] [PATCH 08/09] powerpc/t4240qds: Add support to dump switch settings on t4240qds board

[Poonam Aggrwal]

From: Shaveta Leekha <shaveta at freescale.com>

This function is called by "qixis_reset switch" command and
switch settings are calculated from qixis FPGA registers.

Signed-off-by: York Sun <yorksun at freescale.com>
Signed-off-by: Shaveta Leekha <shaveta at freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal at freescale.com>
---
 board/freescale/t4qds/t4qds.c |   60 +++++++++++++++++++++++++++++++++++++++++
 1 files changed, 60 insertions(+), 0 deletions(-)

diff --git a/board/freescale/t4qds/t4qds.c b/board/freescale/t4qds/t4qds.c
index 88b8ced..ac1ce62 100644
--- a/board/freescale/t4qds/t4qds.c
+++ b/board/freescale/t4qds/t4qds.c
@@ -393,3 +393,63 @@ void ft_board_setup(void *blob, bd_t *bd)
 	fdt_fixup_board_enet(blob);
 #endif
 }
+
+/*
+ * Reverse engineering switch settings.
+ * Some bits cannot be figured out. They will be displayed as
+ * underscore in binary format. mask[] has those bits.
+ * Some bits are calculated differently than the actual switches
+ * if booting with overriding by FPGA.
+ */
+void qixis_dump_switch(void)
+{
+	int i;
+	u8 sw[9];
+
+	/*
+	 * Any bit with 1 means that bit cannot be reverse engineered.
+	 * It will be displayed as _ in binary format.
+	 */
+	static const u8 mask[] = {0, 0, 0, 0, 0, 0x1, 0xdf, 0x3f, 0x1f};
+	char buf[10];
+	u8 brdcfg[16], dutcfg[16];
+
+	for (i = 0; i < 16; i++) {
+		brdcfg[i] = qixis_read(offsetof(struct qixis, brdcfg[0]) + i);
+		dutcfg[i] = qixis_read(offsetof(struct qixis, dutcfg[0]) + i);
+	}
+
+	sw[0] = dutcfg[0];
+	sw[1] = (dutcfg[1] << 0x07)		| \
+		((dutcfg[12] & 0xC0) >> 1)	| \
+		((dutcfg[11] & 0xE0) >> 3)	| \
+		((dutcfg[6] & 0x80) >> 6)	| \
+		((dutcfg[1] & 0x80) >> 7);
+	sw[2] = ((brdcfg[1] & 0x0f) << 4)	| \
+		((brdcfg[1] & 0x30) >> 2)	| \
+		((brdcfg[1] & 0x40) >> 5)	| \
+		((brdcfg[1] & 0x80) >> 7);
+	sw[3] = brdcfg[2];
+	sw[4] = ((dutcfg[2] & 0x01) << 7)	| \
+		((dutcfg[2] & 0x06) << 4)	| \
+		((~QIXIS_READ(present)) & 0x10)	| \
+		((brdcfg[3] & 0x80) >> 4)	| \
+		((brdcfg[3] & 0x01) << 2)	| \
+		((brdcfg[6] == 0x62) ? 3 :	\
+		((brdcfg[6] == 0x5a) ? 2 :	\
+		((brdcfg[6] == 0x5e) ? 1 : 0)));
+	sw[5] = ((brdcfg[0] & 0x0f) << 4)	| \
+		((QIXIS_READ(rst_ctl) & 0x30) >> 2) | \
+		((brdcfg[0] & 0x40) >> 5);
+	sw[6] = (brdcfg[11] & 0x20);
+	sw[7] = (((~QIXIS_READ(rst_ctl)) & 0x40) << 1) | \
+		((brdcfg[5] & 0x10) << 2);
+	sw[8] = ((brdcfg[12] & 0x08) << 4)	| \
+		((brdcfg[12] & 0x03) << 5);
+
+	puts("DIP switch (reverse-engineering)\n");
+	for (i = 0; i < 9; i++) {
+		printf("SW%d         = 0b%s (0x%02x)\n",
+			i + 1, byte_to_binary_mask(sw[i], mask[i], buf), sw[i]);
+	}
+}
-- 
1.6.5.6