[U-Boot] [PATCH] mx53loco: Fix PMIC name

Robert Nelson robertcnelson at gmail.com
Wed Dec 26 18:51:29 CET 2012


On Wed, Dec 26, 2012 at 11:21 AM, Fabio Estevam <festevam at gmail.com> wrote:
> On Wed, Dec 26, 2012 at 3:08 PM, Robert Nelson <robertcnelson at gmail.com> wrote:
>
>> I'll keep debugging it here, did reverting this commit, help with the resets?
>> http://git.denx.de/?p=u-boot.git;a=commit;h=28e5ac2d974547bde0c72aa0c1d66fd22c6ef3ad
>
> Tried reverting it and still see the data-aborts.
>
> I am also testing on my mx53loco board with the mc34708 pmic and I see
> that it hangs on boot about 10% of the attempts:
> U-Boot 2013.01-rc2-00172-gf8cfcf1-dirty (Dec 26 2012 - 15:15:27)
>
> Board: MX53 LOCO
> I2C:   ready
> DRAM:  1 GiB
> MMC:   FSL_SDHC: 0, FSL_SDHC: 1
>
> This did not happen prior to commit c73368150 (pmic: Extend PMIC
> framework to support multiple instances
> of PMIC devices).

Okay, now we are on the same page, upgraded to:
 "arm-linux-gnueabihf-gcc (crosstool-NG
linaro-1.13.1-4.7-2012.12-20121214 - Linaro GCC 2012.12) 4.7.3
20121205 (prerelease)"..

With your Dialog patch, it is properly setting 1Ghz, and just keeps
rebooting.. :)

U-Boot 2013.01-rc2-00173-ga0d04f3 (Dec 26 2012 - 11:47:34)

Board: MX53 LOCO
I2C:   ready
DRAM:  1 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
*** Warning - bad CRC, using default environment
In:    serial
Out:   serial
Err:   serial
CPU:   Freescale i.MX53 family rev2.0 at 1000 MHz
Reset cause: WDOG
Net:   FEC
Warning: FEC using MAC address from net device

Hit any key to stop autoboot:  0

data abort
    MAYBE you should read doc/README.arm-unaligned-accesses
pc : [<aff72250>]	   lr : [<aff72228>]
sp : af565d68  ip : fffffff4	 fp : 00000000
r10: 00000003  r9 : affab8d9	 r8 : af565f58
r7 : 00000000  r6 : e5bc345d	 r5 : af6df330  r4 : e5bc345d
r3 : af6df334  r2 : af6df333	 r1 : 00000000  r0 : af6df330
Flags: nzCv  IRQs off  FIQs off  Mode SVC_32

Resetting CPU ...
resetting ...

U-Boot 2013.01-rc2-00173-ga0d04f3 (Dec 26 2012 - 11:47:34)

Board: MX53 LOCO
I2C:   ready
DRAM:  1 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
*** Warning - bad CRC, using default environment
In:    serial
Out:   serial
Err:   serial
CPU:   Freescale i.MX53 family rev2.0 at 1000 MHz

Reset cause: WDOG

Regards,

-- 
Robert Nelson
http://www.rcn-ee.com/


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