[U-Boot] [PATCH 1/2 V2] arm926: Flush the data cache before disabling it.

[Sughosh Ganu]

On Tue Jan 10, 2012 at 09:07:58PM +0100, Marek Vasut wrote:
> > The current implementation invalidates the cache instead of flushing
> > it. This causes problems on platforms where the spl/u-boot is already
> > loaded to the RAM, with caches enabled by a first stage bootloader.
> 
> What platforms are affected?

  It is causing a problem on the hawkboard, where the spl is loaded
  directly to the RAM by a rom bootloader. We did not see this earlier
  since cpu_init_crit was not getting called due to
  CONFIG_SKIP_LOWLEVEL_INIT.

-sughosh