[U-Boot] [PATCH] kirkwood_spi: correct access to irq_mask register
Prafulla Wadaskar
prafulla at marvell.com
Thu Jan 12 17:22:17 CET 2012
> -----Original Message-----
> From: Ian Campbell [mailto:ijc at hellion.org.uk]
> Sent: 12 January 2012 21:40
> To: u-boot at lists.denx.de
> Cc: Ian Campbell; Prafulla Wadaskar; Albert ARIBAUD
> Subject: [PATCH] kirkwood_spi: correct access to irq_mask register
>
> Problem appears to have been present since day one but masked because
> alignment
> aborts were not enabled. ca4b55800ed7 "arm, arm926ejs: always do cpu
> critical
> inits" turned on alignment aborts and uncovered this latent problem.
>
> Signed-off-by: Ian Campbell <ijc at hellion.org.uk>
> Acked-By: Jason Cooper <u-boot at lakedaemon.net>
> Tested-By: Holger Brunck <holger.brunck at keymile.com>
> Cc: Prafulla Wadaskar <prafulla at marvell.com>
> Cc: Albert ARIBAUD <albert.u.boot at aribaud.net>
> ---
> v2: Resending per patch submission guidelines.
> ---
> drivers/spi/kirkwood_spi.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
> index dfe542d..db8ba8b 100644
> --- a/drivers/spi/kirkwood_spi.c
> +++ b/drivers/spi/kirkwood_spi.c
> @@ -66,7 +66,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus,
> unsigned int cs,
> debug("data = 0x%08x \n", data);
>
> writel(KWSPI_SMEMRDIRQ, &spireg->irq_cause);
> - writel(KWSPI_IRQMASK, spireg->irq_mask);
> + writel(KWSPI_IRQMASK, &spireg->irq_mask);
>
> /* program mpp registers to select SPI_CSn */
> if (cs) {
Hi Ian
Thanks for the patch (resend :-) )
Actually it was in my pipeline.
I will pull this ASAP as well as other patches in my plate.
Regards..
Prafulla . ..
> --
> 1.7.5.4
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