[U-Boot] [PATCH 1/2 V2] arm926: Flush the data cache before disabling it.

[Sughosh Ganu]

On Fri Jan 13, 2012 at 07:41:37AM -0700, Tom Rini wrote:
> On Fri, Jan 13, 2012 at 1:26 AM, Sughosh Ganu <urwithsughosh at gmail.com> wrote:

<snip>

> >> >        bic     r0, r0, #0x00000087     /* clear bits 7, 2:0 (B--- -CAM) */
> >> >        orr     r0, r0, #0x00000002     /* set bit 2 (A) Align */
> >> >        orr     r0, r0, #0x00001000     /* set bit 12 (I) I-Cache */
> >>
> >> Although this is not changed in your patch, the last line makes me
> >> wonder. The comment says "disable MMU stuff and cached", but actually
> >> the last line sets bit 12 (I), which means that I-Cache gets enabled
> >> according to [1].
> >
> >  Yeah, this seems to be copied code, with discrepancies in the code
> >  and comments. You would see that the line i have removed has a
> >  comment for flushing the cache, but instead it is invalidating the
> >  cache. I have just fixed the comments for the lines that i made
> >  changes to.
> 
> I think while we're in here and noticing these things we should fix
> the comments at least.

  Will fix them in the next version.

-sughosh