[U-Boot] [PATCH 1/2] fsl_pmic.h: add regulator mode 0 and 1 bits

[Stefano Babic]

On 16/01/2012 12:10, Helmut Raiger wrote:
> Add bit definitions for register 32 and 33 of Freescale PMIC.
> 
> Signed-off-by: Helmut Raiger <helmut.raiger at hale.at>
> ---
>  include/fsl_pmic.h |   52 ++++++++++++++++++++++++++++++++++++++++++++++++++++
>  1 files changed, 52 insertions(+), 0 deletions(-)
> 

Hi Helmut,

> diff --git a/include/fsl_pmic.h b/include/fsl_pmic.h
> index 742f2e1..17e7b82 100644
> --- a/include/fsl_pmic.h
> +++ b/include/fsl_pmic.h
> @@ -102,6 +102,58 @@ enum {
>  	PMIC_NUM_OF_REGS,
>  };
>  
> +/* REG_MODE_0 */
> +#define VAUDIOEN	(1 << 0)
> +#define VAUDIOSTBY	(1 << 1)

No, this is not correct. I explain it better. Freescale's PMIC that we
currently support have the same register names, but their layout
differs. What you are defining here is valid for the MC13783, but
conflicts with the mc13892.

See the comments inside fsl_pmic.h:

/*
 * The registers of different PMIC has the same meaning
 * but the bit positions of the fields can differ or
 * some fields has a meaning only on some devices.
 * You have to check with the internal SPI bitmap
 * (see Freescale Documentation) to set the registers
 * for the device you are using
 */

I checked the REG_0 registers in both PMIC and they differ. The way to
do is to have a pmic specific header file with the bit definitions. We
have already include/mc13892.h, and you can add include/mc13783.h with
the constants you need.

Best regards,
Stefano Babic

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