[U-Boot] mx28 spl power cpu clock configuration
Robert Deliën
robert at delien.nl
Wed Jan 25 18:26:15 CET 2012
> Robert ... do you really want to cooperate and help fix stuff mainline or do you
> want to keep everyone in blind, make them guess/help you and when you fix
> something, never come back and have the fix only for yourself?
Well, given my very verbose thread start, including oscillographs, it it not my
intention to leave everyone in the blind.
My 'fix' as it is now, doesn't fix any real problem. It's not finished yet. As it looks
now, it makes the JTAG connection unreliable. Data is getting corrupted when it's
read or written. However, the system no longer hangs up itself.
I will post a patch when I've found a working solution. It's in my best interest
to have it tested and reviewed by you guys, as you understand the clock tree
of this SoC a lot better than I. Besides that, I'd like to have it in the mainline as
well, so we don't have to maintain our patches.
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