[U-Boot] [PATCH] omap_hsmmc: Wait for CMDI to be clear

[Tom Rini]

Before we can send a command we need both the DATI (command inhibit on
mmc_dat line) bit and CMDI (command inhibit on mmc_cmd line) are clear.
The previous behavior of only checking on DATI was insufficient on some
cards and incorrect behavior in any case.  This makes the code check
for both bits being clear and makes the error print more clear as
to what happened.  DATI_CMDDIS is removed as it was unused elsewhere
in the code and stood for 'DATI is set, cmds are disabled still'.

Fix originally spotted by Peter Bigot.

Tested-by: Peter A. Bigot <bigotp at acm.org>
Tested-by: Robert Nelson <robertcnelson at gmail.com>
Signed-off-by: Tom Rini <trini at ti.com>
---
 arch/arm/include/asm/arch-am33xx/mmc_host_def.h |    2 +-
 arch/arm/include/asm/arch-omap3/mmc_host_def.h  |    2 +-
 arch/arm/include/asm/arch-omap4/mmc_host_def.h  |    2 +-
 arch/arm/include/asm/arch-omap5/mmc_host_def.h  |    2 +-
 drivers/mmc/omap_hsmmc.c                        |    5 +++--
 5 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/arch/arm/include/asm/arch-am33xx/mmc_host_def.h b/arch/arm/include/asm/arch-am33xx/mmc_host_def.h
index 5d7dd4b..943526b 100644
--- a/arch/arm/include/asm/arch-am33xx/mmc_host_def.h
+++ b/arch/arm/include/asm/arch-am33xx/mmc_host_def.h
@@ -97,7 +97,7 @@ typedef struct hsmmc {
 #define INDEX_MASK			(0x3f << 24)
 #define INDEX(i)			(i << 24)
 #define DATI_MASK			(0x1 << 1)
-#define DATI_CMDDIS			(0x1 << 1)
+#define CMDI_MASK			(0x1 << 0)
 #define DTW_1_BITMODE			(0x0 << 1)
 #define DTW_4_BITMODE			(0x1 << 1)
 #define DTW_8_BITMODE                   (0x1 << 5) /* CON[DW8]*/
diff --git a/arch/arm/include/asm/arch-omap3/mmc_host_def.h b/arch/arm/include/asm/arch-omap3/mmc_host_def.h
index 2963679..f8c42c0 100644
--- a/arch/arm/include/asm/arch-omap3/mmc_host_def.h
+++ b/arch/arm/include/asm/arch-omap3/mmc_host_def.h
@@ -129,7 +129,7 @@ struct hsmmc {
 #define INDEX_MASK			(0x3f << 24)
 #define INDEX(i)			(i << 24)
 #define DATI_MASK			(0x1 << 1)
-#define DATI_CMDDIS			(0x1 << 1)
+#define CMDI_MASK			(0x1 << 0)
 #define DTW_1_BITMODE			(0x0 << 1)
 #define DTW_4_BITMODE			(0x1 << 1)
 #define DTW_8_BITMODE                   (0x1 << 5) /* CON[DW8]*/
diff --git a/arch/arm/include/asm/arch-omap4/mmc_host_def.h b/arch/arm/include/asm/arch-omap4/mmc_host_def.h
index 74439c9..ce1bce1 100644
--- a/arch/arm/include/asm/arch-omap4/mmc_host_def.h
+++ b/arch/arm/include/asm/arch-omap4/mmc_host_def.h
@@ -107,7 +107,7 @@ struct hsmmc {
 #define INDEX_MASK			(0x3f << 24)
 #define INDEX(i)			(i << 24)
 #define DATI_MASK			(0x1 << 1)
-#define DATI_CMDDIS			(0x1 << 1)
+#define CMDI_MASK			(0x1 << 0)
 #define DTW_1_BITMODE			(0x0 << 1)
 #define DTW_4_BITMODE			(0x1 << 1)
 #define DTW_8_BITMODE                   (0x1 << 5) /* CON[DW8]*/
diff --git a/arch/arm/include/asm/arch-omap5/mmc_host_def.h b/arch/arm/include/asm/arch-omap5/mmc_host_def.h
index 74439c9..ce1bce1 100644
--- a/arch/arm/include/asm/arch-omap5/mmc_host_def.h
+++ b/arch/arm/include/asm/arch-omap5/mmc_host_def.h
@@ -107,7 +107,7 @@ struct hsmmc {
 #define INDEX_MASK			(0x3f << 24)
 #define INDEX(i)			(i << 24)
 #define DATI_MASK			(0x1 << 1)
-#define DATI_CMDDIS			(0x1 << 1)
+#define CMDI_MASK			(0x1 << 0)
 #define DTW_1_BITMODE			(0x0 << 1)
 #define DTW_4_BITMODE			(0x1 << 1)
 #define DTW_8_BITMODE                   (0x1 << 5) /* CON[DW8]*/
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index ef64e37..2400db2 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -198,9 +198,10 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
 	ulong start;
 
 	start = get_timer(0);
-	while ((readl(&mmc_base->pstate) & DATI_MASK) == DATI_CMDDIS) {
+	while ((readl(&mmc_base->pstate) & (DATI_MASK | CMDI_MASK)) != 0) {
 		if (get_timer(0) - start > MAX_RETRY_MS) {
-			printf("%s: timedout waiting for cmddis!\n", __func__);
+			printf("%s: timedout waiting on cmd inhibit to clear\n",
+					__func__);
 			return TIMEOUT;
 		}
 	}
-- 
1.7.0.4