[U-Boot] [PATCH 3/3] mx6q: mx6qsabrelite: Add ECSPI support to the Sabrelite platform

[Jason Hui]

Eric,

On Tue, Jan 31, 2012 at 3:52 AM, Eric Nelson
<eric.nelson at boundarydevices.com> wrote:
> Signed-off-by: Eric Nelson <eric.nelson at boundarydevices.com>
> Acked-by: Dirk Behme <dirk.behme at de.bosch.com>
> Acked-by: Stefano Babic <sbabic at denx.de>
> ---
>  board/freescale/mx6qsabrelite/imximage.cfg    |    2 +-
>  board/freescale/mx6qsabrelite/mx6qsabrelite.c |   25 +++++++++++++++++++++++++
>  include/configs/mx6qsabrelite.h               |    9 +++++++++
>  3 files changed, 35 insertions(+), 1 deletions(-)

After apply the patch, I have the build errors:
../mx6qsabrelite/mx6qsabrelite.c:211: undefined reference to `IMX_GPIO_NR'

So, the patch should depends on others. If one patch set is depend on
others, it's better to tell it
in the cover letter of your patch set. Thanks.

>
> diff --git a/board/freescale/mx6qsabrelite/imximage.cfg b/board/freescale/mx6qsabrelite/imximage.cfg
> index 83dee6f..c389427 100644
> --- a/board/freescale/mx6qsabrelite/imximage.cfg
> +++ b/board/freescale/mx6qsabrelite/imximage.cfg
> @@ -156,7 +156,7 @@ DATA 4 0x021b0404 0x00011006
>
>  # set the default clock gate to save power
>  DATA 4 0x020c4068 0x00C03F3F
> -DATA 4 0x020c406c 0x0030FC00
> +DATA 4 0x020c406c 0x0030FC03
>  DATA 4 0x020c4070 0x0FFFC000
>  DATA 4 0x020c4074 0x3FF00000
>  DATA 4 0x020c4078 0x00FFF300
> diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
> index a53b01f..b4282aa 100644
> --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
> +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
> @@ -46,6 +46,10 @@ DECLARE_GLOBAL_DATA_PTR;
>        PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED   |             \
>        PAD_CTL_DSE_40ohm   | PAD_CTL_HYS)
>
> +#define SPI_PAD_CTRL (PAD_CTL_HYS |                            \
> +       PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED |             \
> +       PAD_CTL_DSE_40ohm     | PAD_CTL_SRE_FAST)
> +
>  int dram_init(void)
>  {
>        gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
> @@ -193,6 +197,23 @@ int board_mmc_init(bd_t *bis)
>  }
>  #endif
>
> +#ifdef CONFIG_MXC_SPI
> +iomux_v3_cfg_t ecspi1_pads[] = {
> +       /* SS1 */
> +       MX6Q_PAD_EIM_D19__GPIO_3_19   | MUX_PAD_CTRL(SPI_PAD_CTRL),
> +       MX6Q_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
> +       MX6Q_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
> +       MX6Q_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
> +};
> +
> +void setup_spi(void)
> +{
> +       gpio_direction_output(IMX_GPIO_NR(3, 19), 1);
> +       imx_iomux_v3_setup_multiple_pads(ecspi1_pads,
> +                                        ARRAY_SIZE(ecspi1_pads));
> +}
> +#endif
> +
>  #define MII_1000BASET_CTRL             0x9
>  #define MII_EXTENDED_CTRL              0xb
>  #define MII_EXTENDED_DATAW             0xc
> @@ -239,6 +260,10 @@ int board_eth_init(bd_t *bis)
>                return ret;
>        }
>
> +#ifdef CONFIG_MXC_SPI
> +       setup_spi();
> +#endif
> +
>        return 0;
>  }
>
> diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h
> index d650ee3..bcb1a42 100644
> --- a/include/configs/mx6qsabrelite.h
> +++ b/include/configs/mx6qsabrelite.h
> @@ -44,6 +44,15 @@
>  #define CONFIG_MXC_UART
>  #define CONFIG_MXC_UART_BASE           UART2_BASE
>
> +#define CONFIG_CMD_SF
> +#ifdef CONFIG_CMD_SF
> +#define CONFIG_SPI_FLASH
> +#define CONFIG_SPI_FLASH_SST
> +#define CONFIG_MXC_SPI
> +#define CONFIG_SF_DEFAULT_SPEED 25000000
> +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
> +#endif
> +
>  /* MMC Configs */
>  #define CONFIG_FSL_ESDHC
>  #define CONFIG_FSL_USDHC
> --
> 1.7.1
>