[U-Boot] [PATCH 09/10 V5] EXYNOS5 : Modify pinnumx settings as per Exynos5250 Rev 1.0

[Rajeshwari Shinde]

This patch modifies the pinmux settings of MMC and UART as per
Exynos5250 Rev 1.0.
It also corrects the gpio offset calculations.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s at samsung.com>
Acked-by: Joonyoung Shim <jy0922.shim at samsung.com>
---
Changes in V2:
       - None.
Changes in V3:
        - Corrected the pinmux settings and offset calcuation of gpio banks.
Changes in V4:
        - None
Changes in V5:
	- None.
 arch/arm/cpu/armv7/exynos/pinmux.c      |   22 +++++++++++++---------
 arch/arm/include/asm/arch-exynos/gpio.h |    7 +++++--
 2 files changed, 18 insertions(+), 11 deletions(-)

diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
index d2b7d2c..822410e 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -40,8 +40,8 @@ static void exynos5_uart_config(int peripheral)
 		count = 4;
 		break;
 	case PERIPH_ID_UART1:
-		bank = &gpio1->a0;
-		start = 4;
+		bank = &gpio1->d0;
+		start = 0;
 		count = 4;
 		break;
 	case PERIPH_ID_UART2:
@@ -66,23 +66,27 @@ static int exynos5_mmc_config(int peripheral, int flags)
 	struct exynos5_gpio_part1 *gpio1 =
 		(struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
 	struct s5p_gpio_bank *bank, *bank_ext;
-	int i;
+	int i, start, gpio_func;
 
 	switch (peripheral) {
 	case PERIPH_ID_SDMMC0:
 		bank = &gpio1->c0;
 		bank_ext = &gpio1->c1;
+		start = 0;
+		gpio_func = GPIO_FUNC(0x2);
 		break;
 	case PERIPH_ID_SDMMC1:
-		bank = &gpio1->c1;
+		bank = &gpio1->c2;
 		bank_ext = NULL;
 		break;
 	case PERIPH_ID_SDMMC2:
-		bank = &gpio1->c2;
-		bank_ext = &gpio1->c3;
+		bank = &gpio1->c3;
+		bank_ext = &gpio1->c4;
+		start = 3;
+		gpio_func = GPIO_FUNC(0x3);
 		break;
 	case PERIPH_ID_SDMMC3:
-		bank = &gpio1->c3;
+		bank = &gpio1->c4;
 		bank_ext = NULL;
 		break;
 	}
@@ -92,8 +96,8 @@ static int exynos5_mmc_config(int peripheral, int flags)
 		return -1;
 	}
 	if (flags & PINMUX_FLAG_8BIT_MODE) {
-		for (i = 3; i <= 6; i++) {
-			s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3));
+		for (i = start; i <= (start + 3); i++) {
+			s5p_gpio_cfg_pin(bank_ext, i, gpio_func);
 			s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_UP);
 			s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
 		}
diff --git a/arch/arm/include/asm/arch-exynos/gpio.h b/arch/arm/include/asm/arch-exynos/gpio.h
index 7a9bb90..97be4ea 100644
--- a/arch/arm/include/asm/arch-exynos/gpio.h
+++ b/arch/arm/include/asm/arch-exynos/gpio.h
@@ -100,7 +100,9 @@ struct exynos5_gpio_part1 {
 	struct s5p_gpio_bank y4;
 	struct s5p_gpio_bank y5;
 	struct s5p_gpio_bank y6;
-	struct s5p_gpio_bank res1[0x980];
+	struct s5p_gpio_bank res1[0x3];
+	struct s5p_gpio_bank c4;
+	struct s5p_gpio_bank res2[0x48];
 	struct s5p_gpio_bank x0;
 	struct s5p_gpio_bank x1;
 	struct s5p_gpio_bank x2;
@@ -122,9 +124,10 @@ struct exynos5_gpio_part2 {
 struct exynos5_gpio_part3 {
 	struct s5p_gpio_bank v0;
 	struct s5p_gpio_bank v1;
+	struct s5p_gpio_bank res1[0x1];
 	struct s5p_gpio_bank v2;
 	struct s5p_gpio_bank v3;
-	struct s5p_gpio_bank res1[0x20];
+	struct s5p_gpio_bank res2[0x1];
 	struct s5p_gpio_bank v4;
 };
 
-- 
1.7.4.4