[U-Boot] [RESEND 11/11] snowball: Adding board specific cache cleanup routine

[Mathieu Poirier]

On 12-07-04 12:53 PM, Wolfgang Denk wrote:
> Dear mathieu.poirier at linaro.org,
> 
> In message <1341413915-7944-12-git-send-email-mathieu.poirier at linaro.org> you wrote:
>> From: "Mathieu J. Poirier" <mathieu.poirier at linaro.org>
>>
>> Following ARM's reference manuel for initializing the cache - the
>> kernel won't boot otherwise.
>>
>> Signed-off-by: Mathieu Poirier <mathieu.poirier at linaro.org>
>> Signed-off-by: John Rigby <john.rigby at linaro.org>
>> ---
>> Changes for v2:
>>    - Correcting cache maintenance register address.
>>    - Invalidating all 16 bits in cache maintenance register.
>>    - Polling cache maintenance register for cleared bits.
>>    - Added comments to the code.
>>    - Re-worked commit description.
>> ---
>>  arch/arm/cpu/armv7/u8500/cpu.c |   16 ++++++++++++++++
>>  1 files changed, 16 insertions(+), 0 deletions(-)
> ...
>> +void cpu_cache_initialization(void)
>> +{
>> +	/* invalidate all cache entries */
>> +	*((volatile unsigned int *)(0xA041277C)) = 0xFFFF;
> ...
>> +	while (*((volatile unsigned int *)(0xA041277C)) & 0xFF)
> ...
>> +	*((volatile unsigned int *)(0xA0412900)) = 0xFF;
>> +	*((volatile unsigned int *)(0xA0412904)) = 0xFF;
> 
> NAK.  Please use proper I/O accessors, and declare a C struct to
> access these registers.

Ok, to make sure I do this properly please point me to an example in the
code base where I can find I/O accessors.

Also, could you be more specific about the C struct you're like to see
implemented - again and example in the code would be welcomed.

Thanks,
Mathieu.

> 
> Best regards,
> 
> Wolfgang Denk
>