[U-Boot] [PATCH] armv7: Fix infinite loop for the spl boot
Zhong Hongbo
bocui107 at gmail.com
Thu Jul 5 14:34:24 CEST 2012
Hi Albert,
On 07/05/2012 08:19 PM, Albert ARIBAUD wrote:
> Hi Zhong Hongbo,
>
> On Thu, 05 Jul 2012 19:53:46 +0800, Zhong Hongbo <bocui107 at gmail.com>
> wrote:
>> Hi Albert,
>>
>> Could you applied the patch to the arm tree?
>>
>> Thanks,
>> hongbo
>> On 07/03/2012 07:46 AM, Zhong Hongbo wrote:
>>> From: Zhong Hongbo <bocui107 at gmail.com>
>>>
>>> In the spl booting step, When __bss_start is equal to __bss_end__,
>>> The loop will clear all the things in CPU space. If there are have
>>> the same address for this symbol, To skip the clear bss section.
>>>
>>> Signed-off-by: Hongbo Zhong <bocui107 at gmail.com>
>>> ---
>>> arch/arm/cpu/armv7/start.S | 3 +++
>>> 1 files changed, 3 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
>>> index 76ccef1..c72f337 100644
>>> --- a/arch/arm/cpu/armv7/start.S
>>> +++ b/arch/arm/cpu/armv7/start.S
>>> @@ -258,6 +258,8 @@ clear_bss:
>>> /* No relocation for SPL */
>>> ldr r0, =__bss_start
>>> ldr r1, =__bss_end__
>>> + cmp r0, r1
>>> + beq skip_clbss
>>> #else
>>> ldr r0, _bss_start_ofs
>>> ldr r1, _bss_end_ofs
>>> @@ -271,6 +273,7 @@ clbss_l:str r2, [r0] /*
>>> clear loop... */ add r0, r0, #4
>>> cmp r0, r1
>>> bne clbss_l
>>> +skip_clbss:
>
> Clearly the loop was wrong in that it should implement a "for (r0 =
> start; r0 < end; r0++)" but actually implements a "for (r0 =
> start; r0 != end; r0++)".
Ok, Good to known, I will send V2
>
> I'd rather the loop be fixed to match the intended implementation
> rather than worked around. Please rewrite your patch to turn:
Ok,
Thanks,
hongbo
>
>> clbss_l:str r2, [r0] /* clear loop...*/
>> add r0, r0, #4
>> cmp r0, r1
>> bne clbss_l
>
> Into something like
>
>> clbss_l:cmp r0, r1
>> blo clbss_d
>> str r2, [r0] /* clear loop...*/
>> add r0, r0, #4
>> b clbss_l
>> clbss_d:
>
> Thanks in advance.
>
> Amicalement,
>
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