[U-Boot] [PATCH 1/1] igep0020: set OMAP MUX mcspi1_cs2 pin to GPIO 176 mode

Javier Martinez Canillas javier at dowhile0.org
Tue Jul 10 03:02:56 CEST 2012


On Mon, Jul 9, 2012 at 10:46 AM, Tom Rini <trini at ti.com> wrote:
> -----BEGIN PGP SIGNED MESSAGE-----
> Hash: SHA1
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> On 07/09/2012 12:32 AM, Enric Balletbò i Serra wrote:
>> Hi Javier,
>>
>> 2012/7/3 Javier Martinez Canillas <javier at dowhile0.org
>> <mailto:javier at dowhile0.org>>
>>
>> According to the IGEPv2 Rev.C data-sheet the LAN9221i pin 14 (IRQ)
>> is connected to the OMAP3730 mcspi1_cs2 pin. Since this omap mux
>> pin acts as an IRQ line, it has to be configured as an input GPIO.
>>
>> IGEPv2 platform code sets the smsc911x_cfg->gpio_irq to GPIO 176
>> but since the mux pin default mode is MODE7 (safe_mode) the driver
>> fails when trying to register the IRQ:
>>
>> [    1.994598] smsc911x: Driver version 2008-10-21 [    3.704162]
>> irq 272: nobody cared (try booting with the "irqpoll" option) [
>> 3.711364] [<c001a114>] (unwind_backtrace+0x0/0xf0) from
>> [<c009a0d4>] (__report_bad_irq+0x20/0xbc) [    3.720916]
>> [<c009a0d4>] (__report_bad_irq+0x20/0xbc) from [<c009a41c>]
>> (note_interrupt+0x1d8/0x238) [    3.730560] [<c009a41c>]
>> (note_interrupt+0x1d8/0x238) from [<c0098234>]
>> (handle_irq_event_percpu+0xc0/0x260) [    3.740936] [<c0098234>]
>> (handle_irq_event_percpu+0xc0/0x260) from [<c0098410>]
>> (handle_irq_event+0x3c/0x5c) [    3.751312] [<c0098410>]
>> (handle_irq_event+0x3c/0x5c) from [<c009abe0>]
>> (handle_level_irq+0xac/0x10c) [    3.761047] [<c009abe0>]
>> (handle_level_irq+0xac/0x10c) from [<c0097a34>]
>> (generic_handle_irq+0x30/0x48) [    3.770935] [<c0097a34>]
>> (generic_handle_irq+0x30/0x48) from [<c02a6b74>]
>> (gpio_irq_handler+0x180/0x1d4) [    3.780944] [<c02a6b74>]
>> (gpio_irq_handler+0x180/0x1d4) from [<c0097a34>]
>> (generic_handle_irq+0x30/0x48) [    3.790954] [<c0097a34>]
>> (generic_handle_irq+0x30/0x48) from [<c0013e18>]
>> (handle_IRQ+0x4c/0xac) [    3.800231] [<c0013e18>]
>> (handle_IRQ+0x4c/0xac) from [<c000858c>]
>> (omap3_intc_handle_irq+0x60/0x74) [    3.809783] [<c000858c>]
>> (omap3_intc_handle_irq+0x60/0x74) from [<c04979e4>]
>> (__irq_svc+0x44/0x60) [    3.819213] Exception stack(0xee42fde0 to
>> 0xee42fe28) [    3.824554] fde0: 00000001 00000001 00000000
>> 00000000 60000013 c06cce14 c06cce14 00000110 [    3.833190] fe00:
>> 00000000 c06ccdf4 60000013 ee41d000 fb058064 ee42fe28 c0089e08
>> c04976b4 [    3.841796] fe20: 20000013 ffffffff [    3.845489]
>> [<c04979e4>] (__irq_svc+0x44/0x60) from [<c04976b4>]
>> (_raw_spin_unlock_irqrestore+0x34/0x44) [    3.855499] [<c04976b4>]
>> (_raw_spin_unlock_irqrestore+0x34/0x44) from [<c0099744>]
>> (__setup_irq+0x1b8/0x3f0) [    3.865875] [<c0099744>]
>> (__setup_irq+0x1b8/0x3f0) from [<c0099a34>]
>> (request_threaded_irq+0xb8/0x140) [    3.875701] [<c0099a34>]
>> (request_threaded_irq+0xb8/0x140) from [<c0487950>]
>> (smsc911x_drv_probe+0x75c/0x11a4) [    3.886260] [<c0487950>]
>> (smsc911x_drv_probe+0x75c/0x11a4) from [<c02e9bcc>]
>> (platform_drv_probe+0x18/0x1c) [    3.896545] [<c02e9bcc>]
>> (platform_drv_probe+0x18/0x1c) from [<c02e89b8>]
>> (driver_probe_device+0x90/0x210) [    3.906707] [<c02e89b8>]
>> (driver_probe_device+0x90/0x210) from [<c02e8bcc>]
>> (__driver_attach+0x94/0x98) [    3.916625] [<c02e8bcc>]
>> (__driver_attach+0x94/0x98) from [<c02e7298>]
>> (bus_for_each_dev+0x50/0x7c) [    3.926177] [<c02e7298>]
>> (bus_for_each_dev+0x50/0x7c) from [<c02e81d4>]
>> (bus_add_driver+0x184/0x248) [    3.935821] [<c02e81d4>]
>> (bus_add_driver+0x184/0x248) from [<c02e909c>]
>> (driver_register+0x78/0x12c) [    3.945465] [<c02e909c>]
>> (driver_register+0x78/0x12c) from [<c0008648>]
>> (do_one_initcall+0x34/0x178) [    3.955108] [<c0008648>]
>> (do_one_initcall+0x34/0x178) from [<c066e8f4>]
>> (kernel_init+0xfc/0x1c0) [    3.964385] [<c066e8f4>]
>> (kernel_init+0xfc/0x1c0) from [<c00140b0>]
>> (kernel_thread_exit+0x0/0x8) [    3.973632] handlers: [
>> 3.976043] [<c034e2cc>] smsc911x_irqhandler [    3.980560] Disabling
>> IRQ #272
>>
>> Signed-off-by: Javier Martinez Canillas <javier at dowhile0.org
>> <mailto:javier at dowhile0.org>> --- board/isee/igep0020/igep0020.h |
>> 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-)
>>
>> diff --git a/board/isee/igep0020/igep0020.h
>> b/board/isee/igep0020/igep0020.h index 3d6e15f..eb1aa30 100644 ---
>> a/board/isee/igep0020/igep0020.h +++
>> b/board/isee/igep0020/igep0020.h @@ -143,5 +143,6 @@ static void
>> setup_net_chip(void); MUX_VAL(CP(SYS_BOOT5),      (IEN  | PTD | DIS
>> | M4)) /* GPIO_7 */\ MUX_VAL(CP(SYS_BOOT6),      (IEN  | PTD | DIS
>> | M4)) /* GPIO_8 */\ MUX_VAL(CP(SDRC_CKE0),      (IDIS | PTU | EN
>> | M0)) /* SDRC_CKE0 */\ -       MUX_VAL(CP(SDRC_CKE1),      (IDIS |
>> PTU | EN  | M0)) /* SDRC_CKE1 */ +       MUX_VAL(CP(SDRC_CKE1),
>> (IDIS | PTU | EN  | M0)) /* SDRC_CKE1 */\ +
>> MUX_VAL(CP(MCSPI1_CS2),     (IEN  | PTD | DIS | M4)) /*
>> GPIO_176-ETH IRQ */ #endif -- 1.7.7.6
>>
>>
>> I'm not sure if this is the correct place to do this.
>>
>> This was discussed for a long, the main question is who must set
>> the pin muxer ?
>>
>> In my opinion u-boot only should set mux for the pins that it is
>> using and I think u-boot is not using this IRQ pin for ethernet
>> driver (not sure, I need to check). At kernel level of course the
>> driver uses this pin. In my opinion the kernel should guarantees
>> that this pin is muxed correctly, not u-boot.
>>
>> Any other opinion ? How this is solved in others boards ?
>
> The kernel must be ensuring the correct muxing.  If we don't need
> something configured U-Boot should not configure it in general.  In
> practice there is a lot of mux setup that has been done in U-Boot in
> the past.  A quick read says we don't need the IRQ pin in U-Boot
> currently so we shouldn't set it, so barring a correction on that, NAK
> and correct the kernel.  Thanks!
>

Hi Enric and Tom,

Thanks a lot for the feedback.

You are right, since the IRQ pin is not used in U-Boot it is better to
fix it on the kernel. For me it wasn't clear before when make sense to
set the mux on U-Boot and when in the kernel, but now it is clear to
me.

I'll cook a patch for the kernel then.

Best regards,
Javier


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