[U-Boot] [V2 14/15] S3C64XX: Move s3c6400.h to cpu.h to support s3c6410 board

Zhong Hongbo bocui107 at gmail.com
Tue Jul 24 16:45:42 CEST 2012


Hi Minkyu,

On 07/24/2012 10:38 AM, Minkyu Kang wrote:
> Dear Zhong Hongbo,
> 
> On 14 July 2012 01:11, Zhong Hongbo <bocui107 at gmail.com> wrote:
>> From: Zhong Hongbo <bocui107 at gmail.com>
>>
>> Signed-off-by: Zhong Hongbo <bocui107 at gmail.com>
>> ---
>> Change for V2:
>>         - New.
>> ---
>>  arch/arm/cpu/arm1176/s3c64xx/pwm.c          |    2 +-
>>  arch/arm/cpu/arm1176/s3c64xx/reset.S        |    2 +-
>>  arch/arm/cpu/arm1176/s3c64xx/speed.c        |    2 +-
>>  arch/arm/cpu/arm1176/s3c64xx/srom.c         |    2 +-
>>  arch/arm/cpu/arm1176/s3c64xx/timer.c        |    2 +-
>>  arch/arm/include/asm/arch-s3c64xx/cpu.h     |   83 ++++++++++++++++++++++++++
>>  arch/arm/include/asm/arch-s3c64xx/s3c6400.h |   84 ---------------------------
>>  board/samsung/smdk6400/lowlevel_init.S      |    2 +-
>>  board/samsung/smdk6400/mem_init.S           |    2 +-
>>  board/samsung/smdk6400/smdk6400.c           |    2 +-
>>  drivers/mtd/nand/s3c64xx.c                  |    2 +-
>>  drivers/serial/s3c64xx.c                    |    2 +-
>>  drivers/usb/host/s3c64xx-hcd.c              |    2 +-
>>  13 files changed, 94 insertions(+), 95 deletions(-)
>>  create mode 100644 arch/arm/include/asm/arch-s3c64xx/cpu.h
>>  delete mode 100644 arch/arm/include/asm/arch-s3c64xx/s3c6400.h
>>
>> diff --git a/arch/arm/cpu/arm1176/s3c64xx/pwm.c b/arch/arm/cpu/arm1176/s3c64xx/pwm.c
>> index d1d70ff..02822fc 100644
>> --- a/arch/arm/cpu/arm1176/s3c64xx/pwm.c
>> +++ b/arch/arm/cpu/arm1176/s3c64xx/pwm.c
>> @@ -28,7 +28,7 @@
>>  #include <errno.h>
>>  #include <pwm.h>
>>  #include <asm/io.h>
>> -#include <asm/arch/s3c6400.h>
>> +#include <asm/arch/cpu.h>
>>  #include <asm/arch/pwm.h>
>>
>>  int pwm_enable(int pwm_id)
>> diff --git a/arch/arm/cpu/arm1176/s3c64xx/reset.S b/arch/arm/cpu/arm1176/s3c64xx/reset.S
>> index 9e5ee84..ee96d6c 100644
>> --- a/arch/arm/cpu/arm1176/s3c64xx/reset.S
>> +++ b/arch/arm/cpu/arm1176/s3c64xx/reset.S
>> @@ -21,7 +21,7 @@
>>   * MA 02111-1307 USA
>>   */
>>
>> -#include <asm/arch/s3c6400.h>
>> +#include <asm/arch/cpu.h>
>>
>>  .globl reset_cpu
>>  reset_cpu:
>> diff --git a/arch/arm/cpu/arm1176/s3c64xx/speed.c b/arch/arm/cpu/arm1176/s3c64xx/speed.c
>> index 05b44b9..5e68090 100644
>> --- a/arch/arm/cpu/arm1176/s3c64xx/speed.c
>> +++ b/arch/arm/cpu/arm1176/s3c64xx/speed.c
>> @@ -32,7 +32,7 @@
>>
>>  #include <common.h>
>>  #include <asm/io.h>
>> -#include <asm/arch/s3c6400.h>
>> +#include <asm/arch/cpu.h>
>>  #include <asm/arch/clock.h>
>>
>>  #define APLL 0
>> diff --git a/arch/arm/cpu/arm1176/s3c64xx/srom.c b/arch/arm/cpu/arm1176/s3c64xx/srom.c
>> index f1b2b34..92fb7af 100644
>> --- a/arch/arm/cpu/arm1176/s3c64xx/srom.c
>> +++ b/arch/arm/cpu/arm1176/s3c64xx/srom.c
>> @@ -25,7 +25,7 @@
>>  #include <common.h>
>>  #include <asm/io.h>
>>  #include <asm/arch/sromc.h>
>> -#include <asm/arch/s3c6400.h>
>> +#include <asm/arch/cpu.h>
>>  /*
>>   * s3c64xx_config_sromc() - select the proper SROMC Bank and configure the
>>   * band width control and bank control registers
>> diff --git a/arch/arm/cpu/arm1176/s3c64xx/timer.c b/arch/arm/cpu/arm1176/s3c64xx/timer.c
>> index 47d7731..eebd0c0 100644
>> --- a/arch/arm/cpu/arm1176/s3c64xx/timer.c
>> +++ b/arch/arm/cpu/arm1176/s3c64xx/timer.c
>> @@ -25,7 +25,7 @@
>>
>>  #include <common.h>
>>  #include <asm/io.h>
>> -#include <asm/arch/s3c6400.h>
>> +#include <asm/arch/cpu.h>
>>  #include <asm/arch/pwm.h>
>>  #include <pwm.h>
>>
>> diff --git a/arch/arm/include/asm/arch-s3c64xx/cpu.h b/arch/arm/include/asm/arch-s3c64xx/cpu.h
>> new file mode 100644
>> index 0000000..5c8dd9d
>> --- /dev/null
>> +++ b/arch/arm/include/asm/arch-s3c64xx/cpu.h
>> @@ -0,0 +1,83 @@
>> +/*
>> + * (C) Copyright 2007
>> + * Byungjae Lee, Samsung Erectronics, bjlee at samsung.com.
>> + *      - only support for S3C6400
>> + *
>> + * (C) Copyright 2008
>> + * Guennadi Liakhovetki, DENX Software Engineering, <lg at denx.de>
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program; if not, write to the Free Software
>> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>> + * MA 02111-1307 USA
>> + */
>> +
>> +/************************************************
>> + * NAME            : s3c64XX.h
>> + *
>> + * Based on S3C64XX User's manual Rev 0.0
>> + ************************************************/
>> +
>> +#ifndef __ASM_ARCH_CPU_H__
>> +#define __ASM_ARCH_CPU_H__
>> +
>> +#if defined(CONFIG_SYNC_MODE) && defined(CONFIG_S3C6400)
>> +#error CONFIG_SYNC_MODE unavailable on S3C6400, please, fix your configuration!
>> +#endif
>> +
>> +#define S3C64XX_UART_CHANNELS  3
>> +#define S3C64XX_SPI_CHANNELS   2
>> +
>> +#include <asm/hardware.h>
>> +
>> +#define ELFIN_CLOCK_POWER_BASE 0x7e00f000
>> +#define ELFIN_GPIO_BASE                0x7f008000
>> +#define ELFIN_SROM_BASE                0x70000000
>> +#define ELFIN_DMC0_BASE                0x7e000000
>> +#define ELFIN_DMC1_BASE                0x7e001000
>> +#define ELFIN_MEM_SYS_CFG      0x7e00f120
>> +#define ELFIN_NAND_BASE                0x70200000
>> +#define ELFIN_VIC0_BASE_ADDR   0x71200000
>> +#define ELFIN_VIC1_BASE_ADDR   0x71300000
>> +#define ELFIN_WATCHDOG_BASE    0x7E004000
>> +#define ELFIN_UART_BASE                0x7F005000
>> +#define ELFIN_TIMER_BASE       0x7F006000
> 
> I have question.
> What is the ELFIN?

I have not modify this name, I don't know the original mean.

> I think we can make the naming to S3C64XX_...

Agree.
> 
>> +
>> +#ifndef __ASSEMBLY__
>> +static inline unsigned int s3c64xx_get_base_uart(void)
>> +{
>> +       return ELFIN_UART_BASE;
>> +}
>> +
>> +static inline unsigned int s3c64xx_get_base_nand(void)
>> +{
>> +       return ELFIN_NAND_BASE;
>> +}
>> +
>> +static inline unsigned int s3c64xx_get_base_timer(void)
>> +{
>> +       return ELFIN_TIMER_BASE;
>> +}
>> +
>> +static inline unsigned int s3c64xx_get_base_clock(void)
>> +{
>> +       return ELFIN_CLOCK_POWER_BASE;
>> +}
>> +
>> +static inline unsigned int s3c64xx_get_base_sromc(void)
>> +{
>> +       return ELFIN_SROM_BASE;
>> +}
>> +#endif
>> +
>> +#endif /*__S3C6400_H__*/
> 
> __CPU__H__?
Ok,

Thanks,
hongbo
> 
> Thanks.
> Minkyu Kang.
> 




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