[U-Boot] [PATCH 0/17] tegra: Add display driver and LCD support for Seaboard
Stephen Warren
swarren at wwwdotorg.org
Tue Jul 24 21:16:54 CEST 2012
On 07/18/2012 12:51 AM, Simon Glass wrote:
> +Tom, Stephen
>
> On Tue, Jul 17, 2012 at 5:11 PM, Thierry Reding
> <thierry.reding at avionic-design.de> wrote:
>> On Sat, Jul 14, 2012 at 10:03:31AM +0200, Simon Glass wrote:
>>> Hi Christian,
>>>
>>> On Thu, Apr 19, 2012 at 2:41 PM, Christian Kroehnert
>>> <christian.kroehnert at avionic-design.de> wrote:
...
>>>> In the display.c source file I implemented a bug fix, because I get garbled
>>>> images on the LCD without this fix.
>>>
>>> I see this code:
>>>
>>> u32 m_value;
>>>
>>> m_value = readl(0x54202e04);
>>> m_value &= ~0x2;
>>> writel(m_value, 0x54202e04);
>>>
>>> What register are you actually writing here? I can't find it in my
>>> manual, but maybe I just haven't seen that address.
>>
>> At the time I did look for that register as well but couldn't find
>> anything. But I believe that we saw the garbled display issue that
>> has been mentioned in another thread. If I remember correctly this
>> particular register write was the fix for it.
>>
>> But I wasn't very much involved at the time, so maybe Christian can
>> clarify. However I was going to test your newest version of the LCD
>> patch series on our hardware and see if the issue is still there.
>
> Does anyone know what this register is for? I am reluctant to add this
> code to the patch without at least a comment.
That address is an alias for DC_WIN_A_BYTE_SWAP_0 (offset 0x701), which
is documented in the TRM. It seems unlikely this was solve the issue at
hand, if I remember it correctly.
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