[U-Boot] [PATCH 2/6] powerpc/corenet_ds: Get rid of the SRIOBOOT_MASTER build target
Liu Gang
Gang.Liu at freescale.com
Thu Jun 7 08:43:05 CEST 2012
Get rid of the SRIOBOOT_MASTER build target, and to support for serving as
a SRIO boot master via environment variable. Set the environment variable
"bootmaster" to "SRIO1" or "SRIO2" using the following command:
setenv bootmaster SRIO1
saveenv
The "bootmaster" will enable the function of the SRIO boot master, and
this has the following advantages compared with SRIOBOOT_MASTER build
configuration:
1. Reduce a build configuration item in boards.cfg file.
No longer need to build a special image for master, just use a
normal target image and set the "bootmaster" variable.
2. No longer need to rebuild an image when change the SRIO port for
boot from SRIO, just set the corresponding value to "bootmaster"
based on the using SRIO port.
Signed-off-by: Liu Gang <Gang.Liu at freescale.com>
---
arch/powerpc/cpu/mpc85xx/cpu_init.c | 17 +++--
arch/powerpc/cpu/mpc8xxx/srio.c | 137 ++++++++++++-----------------------
arch/powerpc/include/asm/fsl_srio.h | 8 +--
boards.cfg | 3 -
include/configs/corenet_ds.h | 32 ++------
5 files changed, 68 insertions(+), 129 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 2cd5db7..4c8b005 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -442,12 +442,17 @@ skip_l2:
#ifdef CONFIG_SYS_SRIO
srio_init();
-#ifdef CONFIG_SRIOBOOT_MASTER
- srio_boot_master();
-#ifdef CONFIG_SRIOBOOT_SLAVE_HOLDOFF
- srio_boot_master_release_slave();
-#endif
-#endif
+ char *s = getenv("bootmaster");
+ if (s) {
+ if (!strcmp(s, "SRIO1")) {
+ srio_boot_master(1);
+ srio_boot_master_release_slave(1);
+ }
+ if (!strcmp(s, "SRIO2")) {
+ srio_boot_master(2);
+ srio_boot_master_release_slave(2);
+ }
+ }
#endif
#if defined(CONFIG_MP)
diff --git a/arch/powerpc/cpu/mpc8xxx/srio.c b/arch/powerpc/cpu/mpc8xxx/srio.c
index c7f3949..0ba7e2a 100644
--- a/arch/powerpc/cpu/mpc8xxx/srio.c
+++ b/arch/powerpc/cpu/mpc8xxx/srio.c
@@ -95,126 +95,91 @@ void srio_init(void)
}
}
-#ifdef CONFIG_SRIOBOOT_MASTER
-void srio_boot_master(void)
+void srio_boot_master(int port)
{
struct ccsr_rio *srio = (void *)CONFIG_SYS_FSL_SRIO_ADDR;
/* set port accept-all */
- out_be32((void *)&srio->impl.port[CONFIG_SRIOBOOT_MASTER_PORT].ptaacr,
+ out_be32((void *)&srio->impl.port[port - 1].ptaacr,
SRIO_PORT_ACCEPT_ALL);
- debug("SRIOBOOT - MASTER: Master port [ %d ] for srio boot.\n",
- CONFIG_SRIOBOOT_MASTER_PORT);
+ debug("SRIOBOOT - MASTER: Master port [ %d ] for srio boot.\n", port);
/* configure inbound window for slave's u-boot image */
debug("SRIOBOOT - MASTER: Inbound window for slave's image; "
"Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
- (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1,
- (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1,
+ (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_MEM_PHYS,
+ (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_MEM_BUS1,
CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[0].riwtar,
- CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1 >> 12);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[0].riwbar,
- CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1 >> 12);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[0].riwar,
+ out_be32((void *)&srio->atmu.port[port - 1].inbw[0].riwtar,
+ CONFIG_SRIOBOOT_SLAVE_IMAGE_MEM_PHYS >> 12);
+ out_be32((void *)&srio->atmu.port[port - 1].inbw[0].riwbar,
+ CONFIG_SRIOBOOT_SLAVE_IMAGE_MEM_BUS1 >> 12);
+ out_be32((void *)&srio->atmu.port[port - 1].inbw[0].riwar,
SRIO_IB_ATMU_AR
| atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE));
/* configure inbound window for slave's u-boot image */
debug("SRIOBOOT - MASTER: Inbound window for slave's image; "
"Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
- (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2,
- (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2,
+ (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_MEM_PHYS,
+ (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_MEM_BUS2,
CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwtar,
- CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2 >> 12);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwbar,
- CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2 >> 12);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwar,
+ out_be32((void *)&srio->atmu.port[port - 1].inbw[1].riwtar,
+ CONFIG_SRIOBOOT_SLAVE_IMAGE_MEM_PHYS >> 12);
+ out_be32((void *)&srio->atmu.port[port - 1].inbw[1].riwbar,
+ CONFIG_SRIOBOOT_SLAVE_IMAGE_MEM_BUS2 >> 12);
+ out_be32((void *)&srio->atmu.port[port - 1].inbw[1].riwar,
SRIO_IB_ATMU_AR
| atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE));
- /* configure inbound window for slave's ucode */
- debug("SRIOBOOT - MASTER: Inbound window for slave's ucode; "
+ /* configure inbound window for slave's ucode and ENV */
+ debug("SRIOBOOT - MASTER: Inbound window for slave's ucode and ENV; "
"Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
- (u64)CONFIG_SRIOBOOT_SLAVE_UCODE_LAW_PHYS,
- (u64)CONFIG_SRIOBOOT_SLAVE_UCODE_SRIO_PHYS,
- CONFIG_SRIOBOOT_SLAVE_UCODE_SIZE);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[2].riwtar,
- CONFIG_SRIOBOOT_SLAVE_UCODE_LAW_PHYS >> 12);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[2].riwbar,
- CONFIG_SRIOBOOT_SLAVE_UCODE_SRIO_PHYS >> 12);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[2].riwar,
+ (u64)CONFIG_SRIOBOOT_SLAVE_UCODE_ENV_MEM_PHYS,
+ (u64)CONFIG_SRIOBOOT_SLAVE_UCODE_ENV_MEM_BUS,
+ CONFIG_SRIOBOOT_SLAVE_UCODE_ENV_SIZE);
+ out_be32((void *)&srio->atmu.port[port - 1].inbw[2].riwtar,
+ CONFIG_SRIOBOOT_SLAVE_UCODE_ENV_MEM_PHYS >> 12);
+ out_be32((void *)&srio->atmu.port[port - 1].inbw[2].riwbar,
+ CONFIG_SRIOBOOT_SLAVE_UCODE_ENV_MEM_BUS >> 12);
+ out_be32((void *)&srio->atmu.port[port - 1].inbw[2].riwar,
SRIO_IB_ATMU_AR
- | atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_UCODE_SIZE));
-
- /* configure inbound window for slave's ENV */
- debug("SRIOBOOT - MASTER: Inbound window for slave's ENV; "
- "Local = 0x%llx, Siro = 0x%llx, Size = 0x%x\n",
- CONFIG_SRIOBOOT_SLAVE_ENV_LAW_PHYS,
- CONFIG_SRIOBOOT_SLAVE_ENV_SRIO_PHYS,
- CONFIG_SRIOBOOT_SLAVE_ENV_SIZE);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[3].riwtar,
- CONFIG_SRIOBOOT_SLAVE_ENV_LAW_PHYS >> 12);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[3].riwbar,
- CONFIG_SRIOBOOT_SLAVE_ENV_SRIO_PHYS >> 12);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[3].riwar,
- SRIO_IB_ATMU_AR
- | atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_ENV_SIZE));
+ | atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_UCODE_ENV_SIZE));
}
-#ifdef CONFIG_SRIOBOOT_SLAVE_HOLDOFF
-void srio_boot_master_release_slave(void)
+void srio_boot_master_release_slave(int port)
{
struct ccsr_rio *srio = (void *)CONFIG_SYS_FSL_SRIO_ADDR;
u32 escsr;
debug("SRIOBOOT - MASTER: "
"Check the port status and release slave core ...\n");
- escsr = in_be32((void *)&srio->lp_serial
- .port[CONFIG_SRIOBOOT_MASTER_PORT].pescsr);
+ escsr = in_be32((void *)&srio->lp_serial.port[port - 1].pescsr);
if (escsr & 0x2) {
if (escsr & 0x10100) {
debug("SRIOBOOT - MASTER: Port [ %d ] is error.\n",
- CONFIG_SRIOBOOT_MASTER_PORT);
+ port);
} else {
debug("SRIOBOOT - MASTER: "
- "Port [ %d ] is ready, now release slave's core ...\n",
- CONFIG_SRIOBOOT_MASTER_PORT);
+ "Port [ %d ] is ready, now release slave's core ...\n",
+ port);
/*
* configure outbound window
* with maintenance attribute to set slave's LCSBA1CSR
*/
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ out_be32((void *)&srio->atmu.port[port - 1]
.outbw[1].rowtar, 0);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ out_be32((void *)&srio->atmu.port[port - 1]
.outbw[1].rowtear, 0);
- if (CONFIG_SRIOBOOT_MASTER_PORT)
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ if (port - 1)
+ out_be32((void *)&srio->atmu.port[port - 1]
.outbw[1].rowbar,
CONFIG_SYS_SRIO2_MEM_PHYS >> 12);
else
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ out_be32((void *)&srio->atmu.port[port - 1]
.outbw[1].rowbar,
CONFIG_SYS_SRIO1_MEM_PHYS >> 12);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ out_be32((void *)&srio->atmu.port[port - 1]
.outbw[1].rowar,
SRIO_OB_ATMU_AR_MAINT
| atmu_size_mask(SRIO_MAINT_WIN_SIZE));
@@ -223,27 +188,22 @@ void srio_boot_master_release_slave(void)
* configure outbound window
* with R/W attribute to set slave's BRR
*/
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ out_be32((void *)&srio->atmu.port[port - 1]
.outbw[2].rowtar,
SRIO_LCSBA1CSR >> 9);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ out_be32((void *)&srio->atmu.port[port - 1]
.outbw[2].rowtear, 0);
- if (CONFIG_SRIOBOOT_MASTER_PORT)
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ if (port - 1)
+ out_be32((void *)&srio->atmu.port[port - 1]
.outbw[2].rowbar,
(CONFIG_SYS_SRIO2_MEM_PHYS
+ SRIO_MAINT_WIN_SIZE) >> 12);
else
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ out_be32((void *)&srio->atmu.port[port - 1]
.outbw[2].rowbar,
(CONFIG_SYS_SRIO1_MEM_PHYS
+ SRIO_MAINT_WIN_SIZE) >> 12);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ out_be32((void *)&srio->atmu.port[port - 1]
.outbw[2].rowar,
SRIO_OB_ATMU_AR_RW
| atmu_size_mask(SRIO_RW_WIN_SIZE));
@@ -252,7 +212,7 @@ void srio_boot_master_release_slave(void)
* Set the LCSBA1CSR register in slave
* by the maint-outbound window
*/
- if (CONFIG_SRIOBOOT_MASTER_PORT) {
+ if (port - 1) {
out_be32((void *)CONFIG_SYS_SRIO2_MEM_VIRT
+ SRIO_LCSBA1CSR_OFFSET,
SRIO_LCSBA1CSR);
@@ -289,8 +249,5 @@ void srio_boot_master_release_slave(void)
"Release slave successfully! Now the slave should start up!\n");
}
} else
- debug("SRIOBOOT - MASTER: Port [ %d ] is not ready.\n",
- CONFIG_SRIOBOOT_MASTER_PORT);
+ debug("SRIOBOOT - MASTER: Port [ %d ] is not ready.\n", port);
}
-#endif
-#endif
diff --git a/arch/powerpc/include/asm/fsl_srio.h b/arch/powerpc/include/asm/fsl_srio.h
index a905a26..3675543 100644
--- a/arch/powerpc/include/asm/fsl_srio.h
+++ b/arch/powerpc/include/asm/fsl_srio.h
@@ -55,10 +55,6 @@ enum atmu_size {
#define atmu_size_bytes(x) (1ULL << ((x & 0x3f) + 1))
extern void srio_init(void);
-#ifdef CONFIG_SRIOBOOT_MASTER
-extern void srio_boot_master(void);
-#ifdef CONFIG_SRIOBOOT_SLAVE_HOLDOFF
-extern void srio_boot_master_release_slave(void);
-#endif
-#endif
+extern void srio_boot_master(int port);
+extern void srio_boot_master_release_slave(int port);
#endif
diff --git a/boards.cfg b/boards.cfg
index 0dee43f..3d6e1f6 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -756,7 +756,6 @@ P3041DS_NAND powerpc mpc85xx corenet_ds freescale -
P3041DS_SDCARD powerpc mpc85xx corenet_ds freescale - P3041DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
P3041DS_SECURE_BOOT powerpc mpc85xx corenet_ds freescale - P3041DS:SECURE_BOOT
P3041DS_SPIFLASH powerpc mpc85xx corenet_ds freescale - P3041DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
-P3041DS_SRIOBOOT_MASTER powerpc mpc85xx corenet_ds freescale - P3041DS:SRIOBOOT_MASTER
P3041DS_SRIOBOOT_SLAVE powerpc mpc85xx corenet_ds freescale - P3041DS:SRIOBOOT_SLAVE,SYS_TEXT_BASE=0xFFF80000
P3060QDS powerpc mpc85xx p3060qds freescale
P3060QDS_NAND powerpc mpc85xx p3060qds freescale - P3060QDS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000
@@ -765,14 +764,12 @@ P4080DS powerpc mpc85xx corenet_ds freesca
P4080DS_SDCARD powerpc mpc85xx corenet_ds freescale - P4080DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
P4080DS_SECURE_BOOT powerpc mpc85xx corenet_ds freescale - P4080DS:SECURE_BOOT
P4080DS_SPIFLASH powerpc mpc85xx corenet_ds freescale - P4080DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
-P4080DS_SRIOBOOT_MASTER powerpc mpc85xx corenet_ds freescale - P4080DS:SRIOBOOT_MASTER
P4080DS_SRIOBOOT_SLAVE powerpc mpc85xx corenet_ds freescale - P4080DS:SRIOBOOT_SLAVE,SYS_TEXT_BASE=0xFFF80000
P5020DS powerpc mpc85xx corenet_ds freescale
P5020DS_NAND powerpc mpc85xx corenet_ds freescale - P5020DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000
P5020DS_SDCARD powerpc mpc85xx corenet_ds freescale - P5020DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
P5020DS_SECURE_BOOT powerpc mpc85xx corenet_ds freescale - P5020DS:SECURE_BOOT
P5020DS_SPIFLASH powerpc mpc85xx corenet_ds freescale - P5020DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
-P5020DS_SRIOBOOT_MASTER powerpc mpc85xx corenet_ds freescale - P5020DS:SRIOBOOT_MASTER
P5020DS_SRIOBOOT_SLAVE powerpc mpc85xx corenet_ds freescale - P5020DS:SRIOBOOT_SLAVE,SYS_TEXT_BASE=0xFFF80000
stxgp3 powerpc mpc85xx stxgp3 stx
stxssa powerpc mpc85xx stxssa stx - stxssa
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 8ed37a5..1f9fdfd 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -390,40 +390,24 @@
#define CONFIG_SYS_SRIO2_MEM_SIZE 0x10000000 /* 256M */
/*
- * SRIOBOOT - MASTER
- */
-#ifdef CONFIG_SRIOBOOT_MASTER
-/* master port for srioboot*/
-#define CONFIG_SRIOBOOT_MASTER_PORT 0
-/* #define CONFIG_SRIOBOOT_MASTER_PORT 1 */
-/*
* for slave u-boot IMAGE instored in master memory space,
* PHYS must be aligned based on the SIZE
*/
-#define CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1 0xfef080000ull
-#define CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1 0xfff80000ull
+#define CONFIG_SRIOBOOT_SLAVE_IMAGE_MEM_PHYS 0xfef080000ull
+#define CONFIG_SRIOBOOT_SLAVE_IMAGE_MEM_BUS1 0xfff80000ull
#define CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE 0x80000 /* 512K */
-#define CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2 0xfef080000ull
-#define CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2 0x3fff80000ull
+#define CONFIG_SRIOBOOT_SLAVE_IMAGE_MEM_BUS2 0x3fff80000ull
/*
- * for slave UCODE instored in master memory space,
+ * for slave UCODE and ENV instored in master memory space,
* PHYS must be aligned based on the SIZE
*/
-#define CONFIG_SRIOBOOT_SLAVE_UCODE_LAW_PHYS 0xfef020000ull
-#define CONFIG_SRIOBOOT_SLAVE_UCODE_SRIO_PHYS 0x3ffe00000ull
-#define CONFIG_SRIOBOOT_SLAVE_UCODE_SIZE 0x10000 /* 64K */
-/*
- * for slave ENV instored in master memory space,
- * PHYS must be aligned based on the SIZE
- */
-#define CONFIG_SRIOBOOT_SLAVE_ENV_LAW_PHYS 0xfef060000ull
-#define CONFIG_SRIOBOOT_SLAVE_ENV_SRIO_PHYS 0x3ffe20000ull
-#define CONFIG_SRIOBOOT_SLAVE_ENV_SIZE 0x20000 /* 128K */
+#define CONFIG_SRIOBOOT_SLAVE_UCODE_ENV_MEM_PHYS 0xfef040000ull
+#define CONFIG_SRIOBOOT_SLAVE_UCODE_ENV_MEM_BUS 0x3ffe00000ull
+#define CONFIG_SRIOBOOT_SLAVE_UCODE_ENV_SIZE 0x40000 /* 256K */
+
/* slave core release by master*/
-#define CONFIG_SRIOBOOT_SLAVE_HOLDOFF
#define CONFIG_SRIOBOOT_SLAVE_BRR_OFFSET 0xe00e4
#define CONFIG_SRIOBOOT_SLAVE_RELEASE_MASK 0x00000001 /* release core 0 */
-#endif
/*
* SRIOBOOT - SLAVE
--
1.7.1
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